Semiconductor integrated circuit and semiconductor device

Abstract

In a semiconductor integrated circuit, a selector 1 selects a signal FB at the input thereof by giving a proper level to a signal EN. By setting two-phase scan clocks SC1, SC2 of F/F 2,4 so that F/F 2,4 are set to the through state, a signal can be passed from F/F 2 to F/F 4 under a through state in the above circuit. Further, there can be fabricated a critical path-ring oscillator which is self-oscillated in the critical path by negatively feeding back the output of F/F 4 to F/F 2 through the signal FB. The logic in the ring is required to be an inverted logic. In a test other than a speed screening test or at the normal operation time, a proper level is given to the signal EN so that the selector 1 is switched to select the input side, thereby cutting a negative feedback path through which the output of F/F 4 is negatively fed back to F/F2.

Dependencies are inferred from the claim text.