High-speed dynamic latch
OwnerGea-ok Cho, Min-kyu Song +1inventors
InventorsGea-ok Cho, Min-kyu Song, Jung-eun Lee
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Abstract
A dynamic latch that can be used in a high-speed analog-to-digital converter is provided. The dynamic latch includes a discharging unit which discharges a first output node in parallel in response to one of a pair of differential input signals and a second output node, and discharges the second output node in parallel in response to the other of the pair of differential input signals and the first output node, and a current source which sinks current from the discharging unit in response to a clock signal. The dynamic latch is capable of removing kick-back voltage which may occur in the existing latch and compensating for a drawback caused by a low-speed charge/discharge, which allows for improvement in operation speed.
Claims10
A high-speed dynamic latch comprising:
- a first output node;
- a second output node;
- a precharging unit which precharges the first and second output nodes in response to a clock signal, a signal from the first output node, and a signal from the second output node;
- a discharging unit which discharges the first output node in parallel in response to one of a pair of differential input signals and a signal from the second output node, and discharges the second output node in parallel in response to the other of the pair of differential input signals and a signal from the first output node;
- and
- a current source which sinks current from the discharging unit in response to the clock signal.
Dependencies are inferred from the claim text.