Method of interconnecting electronic components using a plurality of conductive studs
AssigneeInternational Business Machines Corporation
InventorsPeter J. Brofman, Sudipta K. Ray, Kathleen A. Stalter
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Abstract
A method of interconnecting electronic components by using a plurality of conductive studs on a surface of a first electronic component and a plurality of corresponding conductive vias on the surface of a second electronic component. Camber on the surface of electronic components may be overcome by coating the surface with a dielectric, planarizing the dielectric, and forming conductive vias corresponding to the contact pads thereon. The conductive studs are substantially lead-free and preferably comprise of copper.
Claims26
A method of interconnecting electronic components comprising the steps of:
- (a) providing a first electronic component having electrical devices with corresponding bonding pads, said first electronic component having a patterned dielectric film formed thereon, said dielectric film having a plurality of protruding conductive studs, said studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices;
- (b) providing a second electronic component having a dielectric film formed thereon, said dielectric film having a plurality of conductive vias corresponding to the studs on said first electronic component;
- (c) providing an interposer having electrical interconnections corresponding to the studs and vias;
- and
- (d) aligning said first electronic component and said second electronic component with said interposer disposed therebetween, such that the studs of said first electronic component and the vias of said second electronic component are adapted to be electrically interconnected by said interposer.
The method of claim 7 wherein in step (b) said plurality of metal vias protrude about 10 to about 15 μm from a surface of said planarized dielectric film.
A method of interconnecting electronic components comprising the steps of:
- (a) providing a semiconductor chip having electrical devices with corresponding bonding pads, said semiconductor chip having a patterned dielectric film formed thereon, said dielectric film having a plurality of protruding conductive studs, said studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices;
- (b) providing a substrate having a cambered surface with a planarized dielectric film formed thereon having a plurality of planar conductive vias of varying depths corresponding to the studs on said semiconductor chip;
- (c) providing an interposer having electrical interconnections corresponding to the studs and vias;
- and
- (d) aligning said semiconductor chip and said substrate with said interposer disposed therebetween, such that the studs of said semiconductor chip and the vias of said substrate are adapted to be electrically interconnected by said interposer.
An electronic module comprising:
- a first electronic component having electrical devices with corresponding bonding pads, said first electronic component having a first dielectric film formed thereon, said film having a plurality of conductive studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices;
- a second electronic component having a second dielectric film formed thereon, said film having a plurality of conductive vias corresponding to the studs on said first electronic component;
- an interposer disposed between said first and second electronic components having a plurality of interconnections corresponding to the studs of said first electronic component and the vias of said second electronic components.
An electronic module comprising
- a semiconductor chip having electrical devices with corresponding bonding pads, said semiconductor chip having a first dielectric film formed thereon, said film having a plurality of conductive studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices;
- a substrate having a cambered surface with a planarized second dielectric film formed thereon, said film having a plurality of conductive vias of varying depths corresponding to the studs on said first electronic component;
- an interposer disposed between said semiconductor chip and said substrate having a plurality of interconnections corresponding to the studs of said semiconductor chip and the vias of said substrate.
Dependencies are inferred from the claim text.