Semiconductor devices

Abstract

A semiconductor device 100 has a substrate 11 including a high breakdown voltage transistor region where transistors with high breakdown voltage and high dielectric strength Qn and Qp are formed and a low breakdown voltage transistor region where transistors with low breakdown voltage and low dielectric strength are formed. The transistors with high voltage breakdown and high dielectric strength Qn and Qp and the transistors with low voltage breakdown and low dielectric strength operate at different voltages. In the high breakdown voltage transistor region, the semiconductor device has metal wiring layers 19a and 19b that are fed with a high potential. The metal wiring layers 19a and 19b are provided over the transistors with high voltage breakdown and high dielectric strength Qn and Qp through a first interlayer dielectric film 16 and a second interlayer dielectric film 17. An element isolation dielectric region 14 is provided over the substrate 11. Fixed potential wiring layers 18a and 18b are provided in the high voltage breakdown transistor region between the element isolation dielectric region 14 and the metal wiring layers 19a and 19b. The fixed potential wiring layers 18a and 18b are connected by contact sections 42a and 42b to contact regions 40a and 40b, respectively, that are composed of impurity diffusion layers formed in the semiconductor substrate 1.

Dependencies are inferred from the claim text.