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US 2001/0017809 A1Published application
Circuit configuration having a variable number of data outputs and device for reading out data from the circuit configuration with the variable number of data outputs
AssigneeInfineon Technologies AG
InventorGunnar Krause
Life of this patent
Estimating the term…
Abstract
A circuit configuration is described which provides the advantage that data can be read out of a serially readable data memory via a freely selectable number of existing data outputs. This is advantageously achieved in that the serial data are routed with a delay effected by memory/delay circuits to a plurality of data outputs.
Claims11
A circuit configuration, comprising:
- a serially readable data memory;
- a first data output;
- an output line connecting said first data output to said data memory;
- a clock generator outputting clock signals;
- a clock line connecting said clock generator to said data memory;
- a second data output;
- and
- a memory/delay circuit having an input connected to said output line and an output connected to said second data output, said data memory outputs a data item stored therein onto said output line when a clock signal is received from said clock generator, the data item output by said data memory is passed on, with a time delay, through said memory/delay circuit to said second data output.
5 more elements
An integrated circuit, comprising:
- a memory module;
- and
- a circuit configuration integrated on said memory module, said circuit configuration including:
- a serially readable data memory containing information relating to said memory module;
- a first data output;
- an output line connecting said first data output to said data memory;
- a clock generator outputting clock signals;
- a clock line connecting said clock generator to said data memory;
- a second data output;
- and
- a memory/delay circuit having an input connected to said output line and an output connected to said second data output, said data memory outputs a data item stored therein onto said output line when a clock signal is received from said clock generator, and the data item output by said data memory is passed on, with a time delay, through said memory/delay circuit to said second data output.
8 more elements
A device for reading out data from a circuit configuration, the device comprising:
- a predefined number of data inputs through which the data can be read in;
- a data memory;
- and
- a control circuit connected to said data memory and to said data inputs, said data memory defining which of said data inputs are active, and said control circuit reading in the data in parallel via said data inputs.
1 more element
Dependencies are inferred from the claim text.