Semiconductor integrated circuit device and data processor device
AssigneeHitachi, Ltd.
InventorTomoyuki Ishii
Life of this patent
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Abstract
To provide a semiconductor memory device capable of fast rewriting with a small area, and/or large-capacity operation with a small area or fast operation and low power consumption operation, peripheral circuits such as logic circuit, buffer memory and sense circuit or part thereof are formed on a semiconductor substrate surface, and memory cells are provided thereon with an insulator film interposed therebetween.
Claims17
A semiconductor memory device comprising two or more different memory cell arrays formed on a chip, at least two different ones of said memory cell arrays being formed at different positions to each other in the vertical direction relative to said chip.
A semiconductor memory device comprising:
- a plurality of matrix-shape arranged semiconductor memory cells each having source and drain regions provided on an insulator film and connected together through a semiconductor, a control electrode, and at least one memory region surrounded by a potential barrier into or from which charges are injected or discharged by applying a voltage between said control electrode and said source, said drain so as to store data by utilizing the fact that the conductance between said source and drain is changed depending upon the amount of charges accumulated in said memory region;
- and
- a plurality of transistors provided on a substrate surface, some of said matrix-shaped semiconductor memory cells and some of said plurality of transistors being formed substantially at different levels in the vertical direction.
A data processor device comprising:
- an authentication function for judging access right;
- a nonvolatile memory cell array formed on an insulator film of a chip;
- and
- a conductor layer provided between a logic circuit for said authentication and said nonvolatile memory.
Dependencies are inferred from the claim text.