Transverse hybrid LOC package
AssigneeMicron Technology, Inc.
InventorDavid J. Corisis
Life of this patent
Estimating the term…
Abstract
A hybrid semiconductor package is formed from a die having two opposed elongate die edges with conductive bond pads arranged transversely relative to the rows of outer leads. A first portion of inner leads is off-die wire bonded to some of the bond pads, and a second portion of inner leads is insulatively attached as LOC leads between the bond pads along the opposed die edges. The hybrid package results in shorter inner leads of increased pitch enabling improved line yield at wire bond and encapsulation, as well as improved electrical performance, particularly for packages with very small dice.
Claims15
An assembly method for a semiconductor device comprising:
- providing a semiconductor die having an active surface, having a pair of opposed long sides, each long side of said opposed long sides having a set of bond pads positioned therealong, and having a pair of opposed short sides;
- providing a lead frame for transverse attachment to said semiconductor die, said lead frame having at least two opposed rows of outer lead ends and at least two sets of inner leads including a first set of inner leads for off-die wire attachment to bond pads of one of said sets of bond pads and a second set of inner leads for LOC wire attachment to bond pads of at least one of said sets of bond pads;
- and
- attaching said second set of inner leads to at least one bond pad of a set of bond pads of said semiconductor die.
An assembly method for a hybrid semiconductor device comprising:
- providing a semiconductor die having an active surface, having two opposed long sides, each opposed long side of said two opposed long sides having a set of at least two bond pads positioned therealong, and having two opposed short sides;
- providing a lead frame for transverse attachment to said integrated circuit semiconductor die, said conductive lead frame having at least two opposed rows of outer lead ends and a plurality of sets of inner leads including a first set of inner leads for off-die wire attachment to bond pads of one of said sets of bond pads and a second set of inner leads for LOC wire attachment to bond pads of at least one of said sets of bond pads;
- and
- attaching said second set of inner leads of said plurality of sets of inner leads to said semiconductor die.
An assembly method for a hybrid semiconductor device comprising:
- providing a semiconductor die having an active surface, having at least two opposed long sides, each long side of said at least two opposed long sides having a set of at least two bond pads positioned therealong;
- providing a lead frame for transverse attachment to said semiconductor die, said lead frame having at least two opposed rows of outer lead ends and a plurality of sets of inner leads including a first set of inner leads for off-die wire attachment to bond pads of one of said set of bond pads and a second set of inner leads for LOC wire attachment to bond pads of at least one of said set of bond pads;
- attaching said second set of inner leads of said plurality of sets of inner leads to said semiconductor die;
- and
- connecting said plurality of sets of inner leads to said set of bond pads using a plurality of wire bonds.
An assembly method for a hybrid semiconductor device comprising:
- providing a semiconductor die having an active surface having a plurality of opposed long sides, each long side of said at least two opposed long sides having a set of at least two bond pads positioned therealong;
- providing a lead frame for transverse attachment to said semiconductor die, said lead frame having at least two opposed rows of outer lead ends and a plurality of sets of inner leads including a first set of inner leads for off-die wire attachment to bond pads of one of said set of bond pads and a second set of inner leads for LOC wire attachment to bond pads of at least one of said set of bond pads;
- attaching said second set of inner leads of said plurality of sets of inner leads to said integrated circuit semiconductor die;
- connecting said plurality of sets of inner leads to said set of bond pads using a plurality of wire bonds;
- encapsulating the semiconductor die, inner leads and wire bonds;
- singulating the at least two opposed rows of outer lead ends;
- and
- adhesively attaching said semiconductor die and a portion of said conductive lead frame to a supportive substrate.
Dependencies are inferred from the claim text.