Low rate removal etch process in the manufacture of semiconductor integrated devices using a dielectric film deposition chamber
OwnerLuca Zanottiinventor
Life of this patent
Estimating the term…
Abstract
The present invention relates an etch process of a dielectric film deposited on a substrate, characterized by using a chamber of PECVD type having an upper electrode coupled with a RF source and a lower electrode connected to ground on which a silicon substrate is placed. The etch of the dielectric film is obtained by means of a plurality of active gases mixed with at least one conveyance gas so as to obtain a low rate of etch and an uniform etch of said deposited dielectric film.
Claims16
A process of etching a dielectric film deposited on a substrate comprising the acts of:
- placing a silicon substrate having a dielectric film deposited thereupon in a plasma enhanced chemical vapor deposition PECVD chamber having an upper electrode coupled with a RF source and a lower electrode connected to ground, where the silicon substrate is placed on the lower electrode;
- and
- etching the deposited dielectric film in said PECVD chamber with a plurality of active gases mixed with at least one conveyance gas.
A process of etching a dielectric film deposited on a substrate comprising the acts of:
- placing a silicon substrate in a plasma enhanced chemical vapor deposition PECVD chamber having an upper electrode coupled with a RF source and a lower electrode connected to ground, where the silicon substrate is placed on the lower electrode;
- depositing of a dielectric film on the silicon substrate in the PECVD chamber;
- combining a plurality of active gases with at least one conveyance gas in said PECVD chamber;
- and
- etching said dielectric film in said PECVD chamber with said combined gases.
Dependencies are inferred from the claim text.