Instruction code conversion unit and information processing system and instruction code generation method
AssigneeKabushiki Kaisha Toshiba
InventorsMoriyasu Banno, Tomoaki Shoda, Hiroshi Itaya, Tomotaka Saito
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AssigneeKabushiki Kaisha Toshiba
InventorsMoriyasu Banno, Tomoaki Shoda, Hiroshi Itaya, Tomotaka Saito
Estimating the term…
An instruction code conversion unit, an information processing system provided with the instruction code conversion unit and an instruction code generation method for generating instruction codes which are converted by the instruction code conversion unit are described. The efficiency of coding of the program is improved by making use of an existing processor as selected is used without modification. An instruction code conversion unit performs conversion of the address of a native instruction code to the address of the corresponding compressed instruction code in a program memory by shifting the address of the native instruction code as outputted from the processor to the right by one bit.
An information processing system comprising:
An instruction code conversion unit connected to a processor capable of executing native instruction codes and a program memory for storing a program at least part of which comprises compressed instruction codes, receiving an address of a native instruction code as outputted from said processor, converting the address of said native instruction code to the address of a corresponding native instruction code in said program memory, reading out said compressed instruction codes from the address of said compressed instruction code as converted as converted, converting said compressed instruction code to said native instruction code as converted, and transferring said native instruction to said processor, wherein said instruction code conversion unit performs conversion of the address of said native instruction code to the address of the corresponding compressed instruction code in said program memory by shifting the address of said native instruction code as outputted from said processor to the right by n bit.
An instruction code generation method comprising:
Dependencies are inferred from the claim text.