Method of forming dram trench capacitor with metal layer over hemispherical grain polysilicon

A method of forming a capacitor comprising:

• forming a conductive capacitor plate comprising polysilicon;
• forming a capacitor dielectric layer operably proximate the conductive capacitor plate;
• and
• forming a metal layer intermediate the conductive capacitor plate and the capacitor dielectric layer.

A method of forming a capacitor comprising:

• forming a capacitor plate layer comprising conductively doped roughened polysilicon;
• forming a dielectric material layer operably proximate the capacitor plate layer;
• and
• interposing a conductive layer between the capacitor plate layer and the dielectric material layer, the conductive layer being more conductive than the capacitor plate layer.

A method of forming a capacitor comprising:

• forming a conductive capacitor plate comprising roughened polysilicon;
• forming a capacitor dielectric layer operably proximate the conductive capacitor plate;
• and
• forming a metal layer consisting essentially of titanium intermediate the conductive capacitor plate and the capacitor dielectric layer.

A method of forming a capacitor comprising:

• forming a first layer comprising conductive material over a substrate outer surface;
• forming a second layer comprising conductive material over the first layer of conductive material;
• forming a layer comprising conductive metal over the second layer;
• and
• forming a layer of dielectric material and a cell plate layer operatively proximate the conductive metal layer to form a capacitor.

A method of forming a capacitor comprising:

• forming a doped semiconductive material over a substrate, the material having a first average conductivity;
• forming a conductive material over the doped semiconductive material, the conductive material having a second average conductivity which is greater than the first average conductivity;
• forming a capacitor dielectric layer over the conductive material;
• and
• forming an outer capacitor plate over the capacitor dielectric layer.

A method of forming a capacitor comprising:

• forming a first capacitor plate comprising an outer surface of hemispherical grain polysilicon;
• forming an elemental titanium layer over the outer surface;
• forming a capacitor dielectric layer over the elemental titanium layer;
• forming a second capacitor plate over the capacitor dielectric layer.

A method of forming a DRAM storage capacitor comprising:

• forming a capacitor opening relative to insulative layer formed over a substrate, the capacitor opening being disposed elevationally over a node location with which electrical connection is to be made;
• forming a first polysilicon material layer within the capacitor opening and in electrical communication with the node location, the first polysilicon material layer having a first conductivity;
• forming a second polysilicon material layer over the first polysilicon material layer, the second polysilicon material layer having an outermost surface with a generally roughened surface area;
• forming a layer comprising a metal material over the second polysilicon material layer's outermost surface, the metal material layer having a second conductivity which is greater than the first conductivity;
• forming a layer comprising a dielectric material over the metal material layer;
• and
• forming a cell plate layer over the dielectric material layer to form a storage capacitor.

A capacitor comprising:

• a substrate having a node location;
• an insulative layer disposed over the substrate and having an opening over the node location;
• a first polysilicon material layer having a first conductivity, the layer being disposed within the opening and operably connected with the node location;
• a second polysilicon material layer over the first polysilicon material layer, the second polysilicon material layer having an outermost surface with a generally roughened surface area;
• a non-polysilicon conductive layer over the second polysilicon material layer's outermost surface, the conductive layer having a second conductivity which is greater than the first conductivity;
• a capacitor dielectric layer over the conductive material layer;
• and
• a capacitor plate over the capacitor dielectric layer.

A capacitor comprising:

• a substrate having a node location;
• a doped semiconductive material capacitor plate operably proximate the node location;
• a metal layer disposed over and operably proximate the first capacitor plate;
• a capacitor dielectric layer disposed over the metal layer and spaced from the semiconductive material capacitor plate;
• and
• a capacitor plate over the capacitor dielectric layer.

A capacitor comprising:

• a substrate having a node location;
• a conductive inner capacitor plate comprising polysilicon operably proximate the node location;
• a metal layer disposed over and in physical contact with the conductive capacitor plate;
• a capacitor dielectric layer disposed over the metal layer and in physical contact therewith;
• and
• an outer capacitor plate over the capacitor dielectric layer.

A capacitor comprising:

• a substrate having a node location;
• an inner conductive capacitor plate having a doped roughened polysilicon outer surface, the plate being connected with the node location and having a first average conductivity;
• a conductive layer connected with the inner conductive capacitor plate and having a second average conductivity which is greater than the first average conductivity;
• a dielectric layer connected with the conductive layer;
• and
• an outer conductive capacitor plate connected with the dielectric layer.

A capacitor comprising:

• a substrate having a node location;
• an inner conductive capacitor plate having a roughened outer surface comprising hemispherical grain polysilicon;
• a metal layer consisting essentially of titanium conformally proximate the roughened outer surface and connected with the capacitor plate;
• a capacitor dielectric layer over the metal layer;
• and
• an outer conductive capacitor plate connected with the dielectric layer.

A capacitor comprising:

• a substrate having an outer surface;
• a first layer comprising conductive material over the outer surface;
• a second layer comprising conductive material over the first layer of material, the first and second layers being different from one another, the second layer having an outer roughened surface;
• a conductive titanium-containing layer disposed in conformal physical contacting relation with the second layer;
• a dielectric layer over the titanium-containing layer;
• and
• a cell plate layer operatively proximate the dielectric layer.

A capacitor comprising:

• a substrate having an outer surface;
• a doped semiconductive material over the outer surface and having a first average conductivity;
• a conductive material over the doped semiconductive material, the conductive material having a second average conductivity which is greater than the first average conductivity, the doped semiconductive material and the conductive material comprising an inner capacitor plate;
• a capacitor dielectric layer over the conductive material;
• and
• an outer capacitor plate over the capacitor dielectric layer.

A capacitor comprising:

• a first capacitor plate comprising an outer surface of hemispherical grain polysilicon;
• an elemental titanium layer over the outer surface;
• a capacitor dielectric layer over the elemental titanium layer;
• and
• a second capacitor plate over the capacitor dielectric layer.