CMOS digital optical navigation chip
AssigneesAgilent Technologies, Inc., Hewlett-Packard Company
InventorsRajeev Badyal, Derek L. Knee, Mark Alan Anderson, Brian James Misek
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AssigneesAgilent Technologies, Inc., Hewlett-Packard Company
InventorsRajeev Badyal, Derek L. Knee, Mark Alan Anderson, Brian James Misek
Estimating the term…
A CMOS digital integrated circuit (IC) chip on which an image is captured, digitized, and then processed on-chip in substantially the digital domain. A preferred embodiment comprises imaging circuitry including a photo cell array for capturing an image and generating a representative analog signal, conversion circuitry including an n-bit successive approximation register (SAR) analog-to-digital converter for converting the analog signal to a corresponding digital signal, filter circuitry including a spatial filter for edge and contrast enhancement of the corresponding image, compression circuitry for reducing the digital signal storage needs, correlation circuitry for processing the digital signal to generate result surface on which a minima resides representing a best fit image displacement between the captured image and previous images, interpolation circuitry for mapping the result surface into x- and y-coordinates, and an interface with a device using the chip, such as a hand-held scanner. The filter circuitry, the compression circuitry, the correlation circuitry and the interpolation circuitry are all advantageously embodied in an on-chip digital signal processor (DSP). The DSP embodiment allows precise algorithmic processing of the digitized signal with almost infinite hold time, depending on storage capability. The corresponding mathematical computations are thus no longer subject to the vagaries of CMOS chip structure processing analog signals. As a result, precise and accurate navigation enables a predictable, reliable and manufacturable design. Parameters may also be programmed into the DSP's “software,” making the chip tunable, as well as flexible and adaptable for different applications.
A integrated circuit chip for capturing and processing images, comprising:
The chip of 6, in which the photo cell array is a 47×47 array of photo cells.
A CMOS integrated circuit chip for capturing and processing images, comprising:
The chip of 24, in which the photo cell array is a 47×47 array of photo cells.
A method for capturing and processing images on a unitary integrated circuit chip, comprising the steps of:
A unitary integrated circuit chip for capturing and processing images, comprising:
Dependencies are inferred from the claim text.