Semiconductor integrated circuit

A semiconductor integrated circuit comprising;

• a plurality of memory blocks capable of parallel operation;
• a read buffer capable of holding a read data read out from a memory block;
• an external interface means capable of externally outputting a read data outputted by said read buffer and a read data outputted by a memory block;
• and
• a controlling means for controlling said read buffer to hold a read data read out from a memory block in response to an external-output-incapable state in which said read data cannot be externally outputted from said external interface means, and while said external-output-incapable state is not present, controlling said external interface means to output the read data read out from a memory block or the read data read out from said read buffer.

A semiconductor integrated circuit comprising;

• a plurality of memory blocks capable of parallel operation;
• an external interface means capable of externally inputting a write data;
• and
• a write buffer capable of receiving and holding a write data inputted to said external interface means, and supplying said write data to a memory block after said memory block is write-enabled.

A semiconductor integrated circuit comprising;

• an external interface means capable of receiving an external input of a write data;
• a write buffer for receiving a write data inputted to said external interface means;
• a plurality of memory blocks to which write data is supplied from said write buffer;
• and
• a controlling means for controlling said write buffer to store said write data supplied to said external interface means in response to an external access request, and after an access-target memory block is write-enabled, controlling said write buffer to supply said write data to said access-target memory block.

A semiconductor integrated circuit comprising;

• a plurality of memory blocks capable of parallel operation;
• an external interface means capable of externally inputting a write data and externally outputting a read data;
• a write buffer for receiving and holding a write data inputted to said external interface means, and supplying said write data to a memory block after said memory block is write-enabled;
• a read buffer capable of holding a read data read out from a memory block in response to an external-output-incapable state in which said read data cannot be externally outputted from said external interface means;
• and
• a selection means for selecting either the read data read out from a memory block or the read data read out from said read buffer and feeding it to said external interface means while said external-output-incapable state is not present.

A semiconductor integrated circuit comprising;

• a plurality of memory blocks capable of parallel operation;
• a first external interface means capable of externally inputting a write data and externally outputting a read data;
• a second external interface means capable of externally inputting a write data and externally outputting a read data;
• a write buffer for receiving and holding a write data inputted to said first or second external interface means, and supplying said write data to a memory block after said memory block is write-enabled;
• a read buffer capable of holing a read data which is to be outputted from said second external interface means, and holding a read data which is to be outputted from said first external interface means but is in an external-output-incapable state in which it cannot be externally outputted from said first external interface means;
• and
• a selection means for selecting either the read data read out from the memory block or the read data read out from said read buffer, and feeding it to said first external interface means while said external-output-incapable state is not present.

A semiconductor integrated circuit comprising;

• a plurality of memory blocks arranged on the opposing ends of a semiconductor chip;
• a read buffer capable of holding a read data read out from a memory block and a write buffer capable of holding a write data to be fed into a memory block, said read buffer and write buffer being disposed between said opposing memory blocks;
• an external interface means disposed in the proximity of said read buffer and write buffer;
• and
• an external connection electrode located in the proximity of said external interface means;
• wherein said write buffer receives and holds a write data inputted to said external interface means, and supplies said write data to a memory block after said memory block is write-enabled, and said read buffer holds a read data read out from a memory block in response to an external-output-incapable state in which said read data cannot be externally outputted from said external interface means.

A semiconductor integrated circuit comprising;

• a semiconductor chip;
• a first dynamic memory formed on said semiconductor chip for storing a plurality of data, said first dynamic memory including a data output section for outputting a corresponding data in response to the reception of a given address signal;
• a second dynamic memory formed on said semiconductor chip for storing a plurality of data, said second dynamic memory including a data output section for outputting a corresponding data in response to the reception of a given address signal;
• an external output circuit formed on said semiconductor chip;
• a first buffer circuit formed on said semiconductor chip, said first buffer being coupled to said output section of said first dynamic memory;
• a first selection circuit formed on said semiconductor chip, comprising a first input coupled to said data output section of said first dynamic memory, a second input coupled to an output of said buffer circuit and an output coupled to said external output circuit;
• a second buffer circuit formed on said semiconductor chip, said second buffer being coupled to said output section of said second dynamic memory;
• a second selection circuit formed on said semiconductor chip, comprising a first input coupled to said data output section of said second dynamic memory, a second input coupled to an output of said buffer circuit and an output coupled to said external output circuit;
• and
• a control circuit for controlling the selection operations of said first and second selection circuits and write actions of said first and second buffer circuits.

A semiconductor integrated circuit comprising;

• a semiconductor chip;
• a memory formed on said semiconductor chip, comprising a data input section, said memory requiring periodical refreshing of stored data;
• a buffer circuit formed on said semiconductor chip, said buffer circuit being coupled to said data input section of said memory;
• an external input circuit formed on said semiconductor chip, said external input circuit being coupled to said buffer circuit and being supplied with data to be written into said memory;
• and
• a control circuit formed on said semiconductor chip for controlling said buffer circuit so as to have said buffer circuit selectively hold a data supplied to said external input circuit during a refresh action of said memory.