Multi-dimensional programmable input selection apparatus and method

A selection circuit, comprising:

• an output node;
• K number of intermediate nodes;
• an output circuit coupled to the output node and the K number of intermediate nodes, the output circuit configured to selectively couple the output node to a different one of the K number of intermediate nodes;
• and
• a plurality of signal source input circuits coupled to the K number of intermediate nodes, each signal source input circuit including K number of input nodes and being configured to couple each of the K number of input nodes to a different one of the K number of intermediate nodes.

A selection circuit, comprising:

• a binary selection tree having an output and K number of inputs;
• and
• a plurality of signal source input circuits coupled to the K number of inputs of the binary selection tree, each signal source input circuit including:
• K number of input nodes;
• a memory cell;
• and
• K number of transistors that each have a gate coupled to an output of the memory cell and that are arranged so that each transistor couples a different one of the K number of input nodes to a different one of the K number of inputs of the binary selection tree.

A method of selecting from among a plurality of input signals, comprising:

• arranging the plurality of input signals into J number of groups of input signals;
• selecting one group from the J number of groups of input signals;
• coupling each one of the input signals in the selected group to a different one of K number of intermediate nodes;
• and
• selecting one of the K number of intermediate nodes with a binary selection tree having K number of inputs.