Dma driven processor cache
Assignee3Com Corporation
InventorsJOHN H. HUGHES, CHRIS M. THOMSON
Life of this patent
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Abstract
The present invention provides a mechanism whereby caching operations, such as prefetch and copyback operations, can be initiated by an external direct memory access (DMA) controller. This allows the DMA controller to govern the inclusion as well as exclusion of data from a processor cache in such as way as to avoid unnecessary cache faults, and to thereby improve system performance. Thus, the present invention effectively provides a synchronization mechanism between an external DMA controller and a processor cache.
Claims3
A computing system, comprising:
- a processor including a cache;
- a memory coupled with the processor;
- and
- a direct memory access device coupled with the processor and the memory;
- wherein the processor includes a mechanism that, in response to a command form the direct memory access device, potentially modifies an entry in the cache.
A method for updating a cache, the method operating in a system including, a processor including the cache, a memory coupled with the processor, and a direct memory access device coupled with the processor and the memory, the method comprising the steps of:
- receiving at the processor a command from the direct memory access device;
- and
- in response to the command, potentially updating an entry in the cache.
Dependencies are inferred from the claim text.