# US 12,772,614 B2 · Display device and method of manufacturing the display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,772,614 B2 - Document ID: US12772614B2 - Status: Granted - Kind: B2 - Application number: 18/344,504 - Filed: 2023-06-29 - Published: 2024-02-22 - Granted: 2026-10-20 - Earliest claimed: 2022-08-17 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., LTD. - Inventors: Su Jeong Kim; Sang Jo Kim; Jin Wan Kim; Hoo Keun Park - Web page: https://patentgrep.com/patent/US12772614B2 ## CPC - H10H 20/818: within the light-emitting regions - H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures - H10H 20/813: having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies - H10H 20/814: having reflecting means, e.g. semiconductor Bragg reflectors - H10H 20/8162: {Current-blocking structures} - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract A display device includes a substrate including a pixel circuit unit, a partition wall including a distributed Bragg reflector (DBR) structure partitioning a light-emitting area and a non-light-emitting area, and light-emitting elements above the substrate, corresponding to the light-emitting area, and including a first semiconductor layer, an active layer, and a porous semiconductor layer. ## Claims ### Claim 1 A display device comprising: a substrate comprising a pixel circuit unit; a partition wall comprising a distributed Bragg reflector (DBR) structure partitioning a light-emitting area and a non-light-emitting area; and light-emitting elements above the substrate and corresponding to the light-emitting area, at least one of the light-emitting elements comprising a first semiconductor layer, an active layer, and a porous semiconductor layer. ### Claim 2 (depends on 1) The display device of claim 1, wherein the DBR structure comprises an undoped GaN layer (PW-U) and a porous GaN layer (PW-NP) that are alternately stacked. ### Claim 3 (depends on 1) The display device of claim 1, wherein the light-emitting elements comprise a first light-emitting element for emitting a first light, a second light-emitting element for emitting a second light, and a third light-emitting element for emitting a third light, and wherein the first light, the second light, and the third light have different respective wavelengths. ### Claim 4 (depends on 3) The display device of claim 3, wherein the partition wall defines a first opening unit, a second opening unit, and a third opening unit having different respective diameters, and overlapping a first light-emitting area, a second light-emitting area, and a third light-emitting area, respectively. ### Claim 5 (depends on 4) The display device of claim 4, wherein the first light-emitting element, the second light-emitting element, and the third light-emitting element respectively correspond to the first light-emitting area, the second light-emitting area, and the third light-emitting area, and wherein the porous semiconductor layer has a different porosity according to a respective wavelength of the light-emitting elements. ### Claim 6 (depends on 5) The display device of claim 5, wherein the first opening unit is wider than the second opening unit, and wherein a porosity of the porous semiconductor layer of the first light-emitting element is greater than that of the porous semiconductor layer of the second light-emitting element. ### Claim 7 (depends on 3) The display device of claim 3, wherein a wavelength of the first light is longer than that of the second light, and wherein a porosity of the porous semiconductor layer of the first light-emitting element is greater than that of the porous semiconductor layer of the second light-emitting element. ### Claim 8 (depends on 5) The display device of claim 5, wherein an indium content of the active layer of the first light-emitting element is higher than that of the active layer of the second light-emitting element, and wherein a porosity of the porous semiconductor layer of the first light-emitting element is greater than that of the porous semiconductor layer of the second light-emitting element. ### Claim 9 (depends on 3) The display device of claim 3, wherein the first light comprises a red light, the second light comprises a green light, and the third light comprises a blue light. ### Claim 10 (depends on 1) The display device of claim 1, further comprising a common electrode above the porous semiconductor layer, wherein the first semiconductor layer, the active layer, and the porous semiconductor layer are sequentially stacked in a direction away from the substrate. ### Claim 11 (depends on 2) The display device of claim 2, wherein the partition wall comprises: a DBR structure layer comprising the DBR structure stacked in an extending direction of the light-emitting elements; and an insulating material layer in the non-light-emitting area excluding the DBR structure layer. ### Claim 12 (depends on 1) The display device of claim 1, wherein the substrate is above the pixel circuit unit, and further comprises pixel electrodes respectively connected to the pixel circuit unit. ### Claim 13 (depends on 12) The display device of claim 12, further comprising connection electrodes respectively between, and respectively connecting, the pixel electrodes and the light-emitting elements. ### Claim 14 A display device comprising: a substrate comprising a pixel circuit unit; a light-blocking partition wall dividing a light-emitting area and a non-light-emitting area; and a first light-emitting element, a second light-emitting element, and a third light-emitting element above the substrate, at least one of the first, second, or third light-emitting elements comprising a first semiconductor layer, an active layer, and a porous semiconductor layer, wherein the first light-emitting element is configured to emit a first light, the second light-emitting element is configured to emit a second light, and the third light-emitting element is configured to emit a third light, and wherein the porous semiconductor layer has different respective porosities in the first light-emitting element, the second light-emitting element, and the third light-emitting element. ### Claim 15 (depends on 14) The display device of claim 14, further comprising a reflective layer between the light-blocking partition wall and the first light-emitting element, and surrounding a side surface of the first light-emitting element, wherein the light-blocking partition wall comprises an insulating material. ### Claim 16 (depends on 15) The display device of claim 15, wherein the reflective layer comprises a metal material having reflectivity. ### Claim 17 (depends on 14) The display device of claim 14, wherein the light-blocking partition wall defines a first opening unit, a second opening unit, and a third opening unit having different respective diameters, and respectively overlapping a first emitting area, a second emitting area, and a third emitting area. ### Claim 18 (depends on 14) The display device of claim 14, further comprising a common electrode above the porous semiconductor layer, wherein the first semiconductor layer, the active layer, and the porous semiconductor layer are sequentially stacked in a direction away from the substrate.