# US 12,771,957 B2 · Image sensor having pixel clusters each including an event processing circuit

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- Number: US 12,771,957 B2
- Document ID: US12771957B2
- Status: Granted
- Kind: B2
- Application number: 18/849,547
- Filed: 2023-03-07
- Published: 2025-06-26
- Granted: 2026-10-20
- Earliest claimed: 2022-03-31
- Assignees: Sony Semiconductor Solutions Corporation
- Applicants: Sony Semiconductor Solutions Corporation
- Inventors: Massimo Zannoni; Koji Ogawa; Raphael Berner; Eshar Ben Dor
- Web page: https://patentgrep.com/patent/US12771957B2

## CPC

- H04N 25/47: Image sensors with pixel address output; Event-driven image sensors; Selection of pixels to be read out based on image data
- H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H04N 25/7795: {Circuitry for generating timing or clock signals}
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

An image sensor includes a plurality of pixel clusters, wherein each pixel cluster includes a number L of pixel circuits. Each pixel circuit outputs pixel event information, wherein the pixel event information indicates whether or not a change of radiation intensity received by the pixel circuit exceeds a positive threshold value and/or whether or not the change of radiation intensity received by the pixel circuit falls below a negative threshold value. An event processing circuit receives pixel information based on the pixel event information of the pixel circuits of a pixel cluster and generates cluster event information indicating whether or not the pixel information of the L pixel circuits fulfills a predefined cluster output condition.

## Claims

### Claim 1

An image sensor, comprising:
a pixel array unit including a plurality of pixel clusters, wherein each pixel cluster includes a number L of pixel circuits, wherein each pixel circuit is configured to output pixel event information, and wherein the pixel event information indicates whether or not a change of radiation intensity received by the pixel circuit exceeds a positive threshold value and whether or not the change of the radiation intensity received by the pixel circuit falls below a negative threshold value, and
an event processing circuit configured to receive pixel information based on the pixel event information of the pixel circuits of a pixel cluster and to generate cluster event information indicating whether or not the pixel information of the L pixel circuits fulfills a predefined cluster output condition,
wherein the event processing circuit is configured to generate the cluster event information indicating that the pixel information fulfills the predefined cluster output condition based on a requirement that the pixel information indicates a plurality of instances of the pixel event information having at least one of (i) an origination from a predefined minimum number of different pixel circuits within the pixel cluster or (ii) a predefined relative timing.

### Claim 2 (depends on 1)

The image sensor according to claim 1, wherein each pixel circuit comprises a pixel photocurrent circuit configured to output a pixel voltage signal, wherein a voltage level of the pixel voltage signal is a function of incoming light intensity, a voltage differencing circuit configured to generate a shifted pixel signal by shifting a voltage level of the pixel voltage signal by an amount determined by a voltage level of the pixel voltage signal at a reset time, and a pixel logic circuit configured to output the pixel event information based on a result of comparisons of the shifted pixel signal with an upper threshold voltage and a lower threshold voltage.

### Claim 3 (depends on 2)

The image sensor according to claim 2, wherein the event processing circuit is configured to reset the voltage differencing circuit each time the pixel information received from the pixel circuits of a pixel cluster fulfills a predefined pixel reset condition.

### Claim 4 (depends on 2)

The image sensor according to claim 2, further comprising:
a switchover circuit configured to switch control of a reset of the voltage differencing circuit between the pixel logic circuit and the event processing circuit.

### Claim 5 (depends on 2)

The image sensor according to claim 2, wherein the event processing circuit is configured to reset the voltage differencing circuit and/or to generate cluster event information indicating that the pixel information of the L pixel circuits fulfills the predefined cluster output condition, if a majority of the pixel circuits of the pixel cluster output pixel event information indicating a pixel-on event and/or if a majority of the pixel circuits of the pixel cluster output pixel event information indicating a pixel-off event.

### Claim 6 (depends on 1)

The image sensor according to claim 1, wherein for each pixel circuit the pixel information and the pixel event information are identical.

### Claim 7 (depends on 2)

The image sensor according to claim 2, further comprising:
temporal voting circuits, wherein each temporal voting circuit is configured to generate the pixel information of a pixel circuit by digitally filtering the pixel event information output by the pixel circuit.

### Claim 8 (depends on 7)

The image sensor according to claim 7, wherein each temporal voting circuit is configured to reset the voltage differencing circuit each time the pixel event information fulfills a predefined temporal pixel reset condition.

### Claim 9 (depends on 7)

The image sensor according to claim 7, wherein each temporal voting circuit comprises at least one delay stage and a voting logic circuit, wherein a first one of the at least one delay stages is configured to receive at least a part of the pixel event information, and wherein the voting logic circuit is configured to generate the pixel information on the basis of at least the output signal(s) of the at least one delay stage.

### Claim 10 (depends on 9)

The image sensor according to claim 9, wherein the temporal voting circuit is configured to pass the received pixel event information from delay stage to delay stage in response to a clock signal.

### Claim 11 (depends on 10)

The image sensor according to claim 10, wherein the pixel circuit is configured to output pixel event information in response to the clock signal.

### Claim 12 (depends on 1)

The image sensor according to claim 1, wherein the event processing circuit includes a feature extraction circuit configured to generate cluster feature information on the basis of the received pixel event information and to output the cluster feature information as the cluster event information or as part of the cluster event information.

### Claim 13 (depends on 12)

The image sensor according to claim 12,
wherein the feature extraction circuit comprises a temporal register and a filter circuit for each of the pixel circuits of the pixel cluster,
wherein each temporal register comprises at least one delay stage, wherein the delay stage or a first one of the delay stages is configured to receive at least a part of the pixel event information of a pixel circuit, and
wherein the filter circuit includes a logical conjunction operation circuit configured to output a filter output signal, multiplexer circuits configured to select an output of at least one delay stage of at least one temporal register of at least one of the pixel circuits of the pixel cluster to be signal-connected to a first input of the logical conjunction operation circuit, and a flip-flop circuit, wherein an input of the flip-flop circuit is electrically connected to an output of the logical conjunction operation circuit and wherein an output of the flip-flop circuit is electrically connected to a second input of the logical conjunction operation circuit.

### Claim 14 (depends on 13)

The image sensor according to claim 13, wherein the feature extraction circuit further comprises an adder circuit for combining filter output signals of the filter circuits of the pixel circuits of the pixel cluster.

### Claim 15 (depends on 14)

The image sensor according to claim 14, wherein the adder circuit comprises a plurality of pixel adder units and an analog-to-digital conversion unit for each pixel column, wherein each adder unit includes a capacitor electrically connected between the output of the filter circuit and a column filter output line, and wherein each analog-to-digital conversion unit converts an analog sum signal on the column filter output line into a digital column sum.

### Claim 16 (depends on 13)

The image sensor according to claim 13, wherein at least one of the multiplexer circuits is controllable by select signals received from outside the pixel array unit, so that the event processing circuit is reconfigurable by controlling signal levels of the select signals.
