# US 12,771,341 B2 · Switching control circuit

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- Number: US 12,771,341 B2
- Document ID: US12771341B2
- Status: Granted
- Kind: B2
- Application number: 18/779,646
- Filed: 2024-07-22
- Published: 2025-03-20
- Granted: 2026-10-20
- Earliest claimed: 2023-09-14
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Akihiro Jonishi
- Web page: https://patentgrep.com/patent/US12771341B2

## CPC

- H03K 17/168: {in composite switches}
- H03K 19/018507: {Interface arrangements}
- H03K 2217/0063: High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A switching control circuit configured to control switching of a first switching device on a power supply side and a second switching device on a ground side, the first and second switching devices being configured to drive a load, the first switching device having an electrode on a low-potential side thereof. The switching control circuit includes: a first level shifter circuit including a first resistor and a first transistor; a driver circuit configured to drive the first switching device, in response to an output from the first level shifter circuit; a first switch connected in parallel with the first resistor; and an ON-OFF control circuit configured to turn on the first switch, in response to a voltage at the electrode becoming negative.

## Claims

### Claim 1

A switching control circuit configured to control switching of a first switching device on a power supply side and a second switching device on a ground side, the first and second switching devices being configured to drive a load, the first switching device having an electrode on a low-potential side thereof, the switching control circuit comprising:
a first level shifter circuit including a first resistor and a first transistor;
a driver circuit configured to drive the first switching device, in response to an output from the first level shifter circuit;
a first switch connected in parallel with the first resistor; and
an ON-OFF control circuit configured to turn on the first switch, in response to a voltage at the electrode becoming negative, wherein
the first resistor has
a first terminal connected to a high potential side of a power supply referenced to a node at which the first switching device and the second switching device are connected, and
a second terminal connected to a drain of the first transistor and the driver circuit.

### Claim 2 (depends on 1)

The switching control circuit according to claim 1, further comprising:
a second level shifter circuit including a second resistor and a second transistor, wherein
the first level shifter circuit is configured to output a set signal to switch the first switching device from off to on,
the second level shifter circuit is configured to output a reset signal to switch the first switching device from on to off, and
the driver circuit drives the first switching device in response to the set signal and the reset signal.

### Claim 3 (depends on 2)

The switching control circuit according to claim 2, further comprising:
a second switch connected in parallel with the second resistor, wherein
the ON-OFF control circuit is configured to turn on the second switch, in response to the voltage at the electrode becoming negative.

### Claim 4 (depends on 3)

The switching control circuit according to claim 3, wherein
each of the first transistor and the second transistor is an n-channel metal-oxide-semiconductor (NMOS) transistor, and
each of the first switch and the second switch is a p-channel metal-oxide-semiconductor (PMOS) transistor.

### Claim 5 (depends on 1)

The switching control circuit according to claim 1, wherein
the switching control circuit is mounted on a semiconductor device that has, on a substrate thereof,
a high side region,
a high voltage junction termination region that is provided around the high side region, and
a reference potential region that is electrically isolated from the high side region by the high voltage junction termination region; and
the switching control circuit further includes a control circuit configured to control the first level shifter circuit, wherein
the driver circuit is formed in the high side region, and
the control circuit is formed in the reference potential region.

### Claim 6

A switching control circuit configured to control switching of a first switching device on a power supply side and a second switching device on a ground side, the first and second switching devices being configured to drive a load, the first switching device having an electrode on a low-potential side thereof, the switching control circuit comprising:
a first level shifter circuit including a first resistor and a first transistor;
a driver circuit configured to drive the first switching device, in response to an output from the first level shifter circuit;
a first switch connected in parallel with the first resistor; and
an ON-OFF control circuit configured to turn on the first switch, in response to a voltage at the electrode becoming negative,
wherein the ON-OFF control circuit includes:
a diode element configured to pass a current when the voltage at the electrode is negative, and
a signal output circuit configured to output a signal to turn on the first switch and to keep the first switch on for a predetermined time period, based on the current flowing through the diode element.

### Claim 7 (depends on 6)

The switching control circuit according to claim 6, wherein
the diode element is a third transistor that is diode-connected,
each of the first transistor and the third transistor is configured with a plurality of transistors having a common channel direction, such that the plurality of transistors constituting the first transistor and the plurality of transistors constituting the third transistors are arranged alternately in a direction perpendicular to the common channel direction.

### Claim 8 (depends on 7)

The switching control circuit according to claim 7, wherein
the switching control circuit is mounted on a semiconductor device that has, on a substrate thereof,
a high side region,
a high voltage junction termination region that is provided around the high side region, and
a reference potential region that is electrically isolated from the high side region by the high voltage junction termination region; and
the switching control circuit further includes a control circuit configured to control the first level shifter circuit, wherein
the driver circuit is formed in the high side region,
the control circuit is formed in the reference potential region, and
the plurality of transistors in each of the first transistor and the third transistor is formed in the high voltage junction termination region.

### Claim 9 (depends on 1)

The switching control circuit according to claim 1, wherein the ON-OFF control circuit includes:
a diode element configured to pass a current when the voltage at the electrode is negative, and
a signal output circuit configured to output a signal to turn on the first switch and to keep the first switch on for a predetermined time period, based on the current flowing through the diode element.
