# US 12,769,348 B2 · Regulator and circuit device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,769,348 B2 - Document ID: US12769348B2 - Status: Granted - Kind: B2 - Application number: 18/743,811 - Filed: 2024-06-14 - Published: 2024-12-19 - Granted: 2026-10-20 - Earliest claimed: 2023-06-15 - Assignees: Seiko Epson Corporation - Applicants: Seiko Epson Corporation - Inventors: Shinichi Sekita - Web page: https://patentgrep.com/patent/US12769348B2 ## CPC - G05F 1/575: characterised by the feedback circuit - G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown} - G05F 1/565: sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A regulator includes a voltage divider circuit that output, as a feedback voltage, a voltage generated by dividing an output voltage; an operational amplifier that compares the feedback voltage with a reference voltage; a drive transistor being disposed between a node at an input voltage and a node at the output voltage and that is controlled based on an output of the operational amplifier; a logic circuit that output an adjustment signal for the output voltage; and an output voltage adjustment circuit configured to adjust the output voltage based on the adjustment signal. The voltage divider circuit includes a plurality of resistors and a plurality of switches each of which is disposed in parallel with a corresponding one of the plurality of resistors. The output voltage adjustment circuit output, to the plurality of switches, a control signal in accordance with the adjustment signal, and the output voltage is supplied as a power supply voltage to the output voltage adjustment circuit. ## Claims ### Claim 1 A regulator for regulating an input voltage to output an output voltage, the regulator comprising: a voltage divider circuit configured to output, as a feedback voltage, a voltage generated by dividing the output voltage; an operational amplifier configured to compare the feedback voltage with a reference voltage; a drive transistor being disposed between a node at the input voltage and a node at the output voltage and configured to be controlled based on an output of the operational amplifier; a logic circuit configured to output a plurality of adjustment signals for the output voltage; and an output voltage adjustment circuit configured to adjust the output voltage based on the plurality of adjustment signals, wherein the voltage divider circuit includes: a plurality of resistors; and a plurality of switches, each switch of the plurality of switches being disposed in parallel with a corresponding resistor of the plurality of resistors, the output voltage adjustment circuit is configured to output, to the plurality of switches, a plurality of control signals in accordance with the plurality of adjustment signals, the output voltage is supplied as a power supply voltage to the output voltage adjustment circuit, and a number of the plurality of adjustment signals is the same as each of a number of the plurality of control signals and a number of the plurality of switches. ### Claim 2 (depends on 1) The regulator according to claim 1, wherein the each switch of the plurality of switches includes an n-type transistor and a p-type transistor coupled in parallel, and the output voltage adjustment circuit includes: a first inverter configured to output a first control signal for controlling one of the n-type transistor and the p-type transistor; and a second inverter configured to receive an output of the first inverter and to output a second control signal for controlling another of the n-type transistor and the p-type transistor. ### Claim 3 (depends on 1) The regulator according to claim 1, wherein the logic circuit: includes an initial value register; and is configured to, after a power-on reset, output the plurality of adjustment signals based on an initial value of an adjustment value for the output voltage from the initial value register. ### Claim 4 (depends on 1) The regulator according to claim 1, wherein the logic circuit is configured to output the plurality of adjustment signals based on an adjustment value for the output voltage read out from a nonvolatile memory. ### Claim 5 (depends on 1) The regulator according to claim 1, wherein the output voltage is supplied as a power supply voltage in common to the output voltage adjustment circuit and the logic circuit. ### Claim 6 (depends on 1) The regulator according to claim 1, wherein the plurality of resistors include; a first resistor group disposed between a feedback voltage node from which the feedback voltage is output and a predetermined voltage node; and a second resistor group disposed between the node at the output voltage and the feedback voltage node. ### Claim 7 (depends on 6) The regulator according to claim 6, wherein the logic circuit is configured to output the plurality of adjustment signals such that when a first switch disposed in parallel with a first resistor of the first resistor group is in one of an on state and an off state, a second switch disposed in parallel with a second resistor of the second resistor group is in another of the on state and the off state. ### Claim 8 (depends on 7) The regulator according to claim 7, wherein the first resistor and the second resistor are registers having the same resistance. ### Claim 9 (depends on 6) The regulator according to claim 6, wherein the voltage divider circuit further includes: a third resistor disposed in series to the first resistor group; and a fourth resistor disposed in series to the second resistor group, and resistances of the third resistor and the fourth resistor are set such that when all of the plurality of switches are on or off, the output voltage is a given set voltage. ### Claim 10 (depends on 6) The regulator according to claim 6, wherein the voltage divider circuit further includes a feedback resistance cut-off switch disposed between the first resistor group and the predetermined voltage node. ### Claim 11 (depends on 10) The regulator according to claim 10, wherein a control signal for the feedback resistance cut-off switch is a signal based on the input voltage. ### Claim 12 (depends on 1) A circuit device comprising: the regulator according to claim 1; a charging circuit configured to, based on the input voltage, charge an object to be charged; and a charge control circuit configured to control the charging circuit, wherein the output voltage is supplied as a power supply voltage for the charge control circuit or a power supply voltage for a detection circuit used for the charge control circuit. ### Claim 13 A regulator for regulating an input voltage to output an output voltage, the regulator comprising: a voltage divider circuit configured to output, as a feedback voltage, a voltage generated by dividing the output voltage; an operational amplifier configured to compare the feedback voltage with a reference voltage; a drive transistor being disposed between a node at the input voltage and a node at the output voltage and configured to be controlled based on an output of the operational amplifier; a logic circuit configured to output an adjustment signal for the output voltage; and an output voltage adjustment circuit configured to adjust the output voltage based on the adjustment signal, wherein the voltage divider circuit includes: a plurality of resistors; and a plurality of switches, each switch of the plurality of switches being disposed in parallel with a corresponding resistor of the plurality of resistors, the output voltage adjustment circuit is configured to output, to the plurality of switches, a control signal in accordance with the adjustment signal, the output voltage is supplied as a power supply voltage to the output voltage adjustment circuit, the each switch of the plurality of switches includes an n-type transistor and a p-type transistor coupled in parallel, and the output voltage adjustment circuit includes: a first inverter configured to output a first control signal for controlling one of the n-type transistor and the p-type transistor; and a second inverter configured to receive an output of the first inverter and to output a second control signal for controlling another of the n-type transistor and the p-type transistor. ### Claim 14 A regulator for regulating an input voltage to output an output voltage, the regulator comprising: a voltage divider circuit configured to output, as a feedback voltage, a voltage generated by dividing the output voltage; an operational amplifier configured to compare the feedback voltage with a reference voltage; a drive transistor being disposed between a node at the input voltage and a node at the output voltage and configured to be controlled based on an output of the operational amplifier; a logic circuit configured to output an adjustment signal for the output voltage; and an output voltage adjustment circuit configured to adjust the output voltage based on the adjustment signal, wherein the voltage divider circuit includes: a plurality of resistors; and a plurality of switches, each switch of the plurality of switches being disposed in parallel with a corresponding resistor of the plurality of resistors, the output voltage adjustment circuit is configured to output, to the plurality of switches, a control signal in accordance with the adjustment signal, the output voltage is supplied as a power supply voltage to the output voltage adjustment circuit, and the plurality of resistors include: a first resistor group disposed between a feedback voltage node from which the feedback voltage is output and a predetermined voltage node; and a second resistor group disposed between the node at the output voltage and the feedback voltage node. ### Claim 15 (depends on 14) The regulator according to claim 14, wherein the logic circuit is configured to output the adjustment signal such that when a first switch disposed in parallel with a first resistor of the first resistor group is in one of an on state and an off state, a second switch disposed in parallel with a second resistor of the second resistor group is in another of the on state and the off state. ### Claim 16 (depends on 15) The regulator according to claim 15, wherein the first resistor and the second resistor are registers having the same resistance. ### Claim 17 (depends on 14) The regulator according to claim 14, wherein the voltage divider circuit further includes: a third resistor disposed in series to the first resistor group; and a fourth resistor disposed in series to the second resistor group, and resistances of the third resistor and the fourth resistor are set such that when all of the plurality of switches are on or off, the output voltage is a given set voltage. ### Claim 18 (depends on 14) The regulator according to claim 14, wherein the voltage divider circuit further includes a feedback resistance cut-off switch disposed between the first resistor group and the predetermined voltage node. ### Claim 19 (depends on 18) The regulator according to claim 18, wherein a control signal for the feedback resistance cut-off switch is a signal based on the input voltage.