Semiconductor device and method of forming encapsulated vertical interconnect structure

Abstract

A semiconductor device has a first vertical interconnect substrate and a second vertical interconnect substrate. A first encapsulant is over the first vertical interconnect structure and second vertical interconnect structure. The first vertical interconnect structure is formed over a substrate. The first vertical interconnect structure can be a plurality of stacked vertical conductive posts. An electrical component is disposed between the first vertical interconnect structure and second vertical interconnect structure, or adjacent to the first vertical interconnect structure and second vertical interconnect structure. A second encapsulant is deposited around the electrical component. A portion of the second encapsulant is removed to expose a first surface of the first vertical interconnect structure. The substrate is removed to expose a second surface of the first vertical interconnect structure. A portion of the first encapsulant can be removed to expose a surface of the first vertical interconnect structure.

Dependencies are inferred from the claim text.