# US 12,765,404 B2 · Semiconductor device and method of forming conductive vias to have enhanced contact to shielding layer

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- Number: US 12,765,404 B2
- Document ID: US12765404B2
- Status: Granted
- Kind: B2
- Application number: 18/304,090
- Filed: 2023-04-20
- Published: 2023-08-31
- Granted: 2026-10-13
- Earliest claimed: 2018-04-17
- Assignees: STATS ChipPAC Pte. Ltd.
- Applicants: STATS ChipPAC Pte. Ltd.
- Inventors: SungSoo Kim; DaeHyeok Ha; SangMi Park
- Web page: https://patentgrep.com/patent/US12765404B2

## CPC

- H10W 70/635: {Through-vias}
- H05K 1/0216: {Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215)}
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate in an offset pattern. An electrical component is disposed in a die attach area over a first surface of the substrate. The conductive vias are formed around the die attach area of the substrate. A first conductive layer is formed over the first surface of the substrate, and a second conductive layer is formed over the second surface. An encapsulant is deposited over the substrate and electrical component. The substrate is singulated through the conductive vias. A first conductive via has a greater exposed surface area than a second conductive via. A shielding layer is formed over the electrical component and in contact with a side surface of the conductive vias. The shielding layer may extend over a second surface of substrate opposite the first surface of the substrate.

## Claims

### Claim 1

A method of making a semiconductor device, comprising:
providing a substrate;
forming a conductive layer over and around the substrate;
forming a plurality of conductive vias through the substrate, wherein a first conductive via of the plurality of conductive vias is adjacent to and offset with respect to a second conductive via of the plurality of conductive vias;
providing a first gap extending partially but not completely through the conductive layer between the first conductive via and second conductive via to form a gear structure of the conductive layer;
disposing an electrical component in a die attach area over a first surface of the substrate; and
singulating the substrate through the first conductive via and second conductive via.

### Claim 2 (depends on 1)

The method of claim 1, further including:
providing a third conductive via of the plurality of conductive vias adjacent to and offset with respect to a fourth conductive via of the plurality of conductive vias and further adjacent to and offset with respect to the second conductive via; and
providing a second gap extending through the conductive layer between the third conductive via and fourth conductive via.

### Claim 3 (depends on 2)

The method of claim 2, wherein a portion of the conductive layer between the first gap and second gap forms a tooth in the gear structure.

### Claim 4 (depends on 1)

The method of claim 1, further including disposing a shielding layer over the electrical component.

### Claim 5 (depends on 1)

The method of claim 1, further including depositing an encapsulant over the substrate and electrical component.

### Claim 6 (depends on 1)

The method of claim 1, wherein a side surface of the first conductive via has a greater exposed surface area than a side surface of the second conductive via.

### Claim 7

A method of making a semiconductor device, comprising:
providing a substrate;
forming a conductive layer over and around the substrate;
forming a plurality of conductive vias through the substrate, wherein a first conductive via of the plurality of conductive vias is adjacent to and offset with respect to a second conductive via of the plurality of conductive vias; and
providing a first gap extending partially but not completely through the conductive layer between the first conductive via and second conductive via.

### Claim 8 (depends on 7)

The method of claim 7, further including:
providing a third conductive via of the plurality of conductive vias adjacent to and offset with respect to a fourth conductive via of the plurality of conductive vias and further adjacent to and offset with respect to the second conductive via; and
providing a second gap extending through the conductive layer between the third conductive via and fourth conductive via.

### Claim 9 (depends on 8)

The method of claim 8, wherein a portion of the conductive layer between the first gap and second gap forms a tooth in a gear structure.

### Claim 10 (depends on 7)

The method of claim 7, further including:
disposing an electrical component in a die attach area over a first surface of the substrate; and
disposing a shielding layer over the electrical component.

### Claim 11 (depends on 10)

The method of claim 10, further including depositing an encapsulant over the substrate and electrical component.

### Claim 12 (depends on 7)

The method of claim 7, further including singulating the substrate through the first conductive via and second conductive via.

### Claim 13 (depends on 7)

The method of claim 7, wherein a side surface of the first conductive via has a greater exposed surface area than a side surface of the second conductive via.

### Claim 14

A semiconductor device, comprising:
a substrate;
a conductive layer formed over and around the substrate;
a plurality of conductive vias formed through the substrate, wherein a first conductive via of the plurality of conductive vias is adjacent to and offset with respect to a second conductive via of the plurality of conductive vias;
a first gap extending partially but not completely through the conductive layer between the first conductive via and second conductive via to form a gear structure of the conductive layer; and
an electrical component disposed in a die attach area over a first surface of the substrate.

### Claim 15 (depends on 14)

The semiconductor device of claim 14, further including:
a third conductive via of the plurality of conductive vias adjacent to and offset with respect to a fourth conductive via of the plurality of conductive vias and further adjacent to and offset with respect to the second conductive via; and
a second gap extending through the conductive layer between the third conductive via and fourth conductive via.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein a portion of the conductive layer between the first gap and second gap forms a tooth in the gear structure.

### Claim 17 (depends on 14)

The semiconductor device of claim 14, further including a shielding layer disposed over the electrical component.

### Claim 18 (depends on 14)

The semiconductor device of claim 14, further including an encapsulant deposited over the substrate and electrical component.

### Claim 19 (depends on 14)

The semiconductor device of claim 14, wherein a side surface of the first conductive via has a greater exposed surface area than a side surface of the second conductive via.

### Claim 20

A semiconductor device, comprising:
a substrate;
a conductive layer formed over and around the substrate;
a plurality of conductive vias formed through the substrate, wherein a first conductive via of the plurality of conductive vias is adjacent to and offset with respect to a second conductive via of the plurality of conductive vias; and
a first gap extending partially but not completely through the conductive layer between the first conductive via and second conductive via to form a gear structure of the conductive layer.

### Claim 21 (depends on 20)

The semiconductor device of claim 20, further including:
a third conductive via of the plurality of conductive vias adjacent to and offset with respect to a fourth conductive via of the plurality of conductive vias and further adjacent to and offset with respect to the second conductive via; and
a second gap extending through the conductive layer between the third conductive via and fourth conductive via.

### Claim 22 (depends on 21)

The semiconductor device of claim 21, wherein a portion of the conductive layer between the first gap and second gap forms a tooth in the gear structure.

### Claim 23 (depends on 20)

The semiconductor device of claim 20, further including:
an electrical component disposed in a die attach area over a first surface of the substrate; and
a shielding layer disposed over the electrical component.

### Claim 24 (depends on 23)

The semiconductor device of claim 23, further including an encapsulant deposited over the substrate and electrical component.

### Claim 25 (depends on 20)

The semiconductor device of claim 20, wherein a side surface of the first conductive via has a greater exposed surface area than a side surface of the second conductive via.

### Claim 26

A semiconductor device, comprising:
a substrate;
a conductive layer formed over and around the substrate; and
a plurality of conductive vias formed through the substrate with a first gap extending partially but not completely through the conductive layer between a first conductive via of the plurality of conductive vias and a second conductive via of the plurality of conductive vias.

### Claim 27 (depends on 26)

The semiconductor device of claim 26, further including a second gap extending through the conductive layer between a third conductive via of the plurality of conductive vias and a fourth conductive via of the plurality of conductive vias.

### Claim 28 (depends on 27)

The semiconductor device of claim 27, wherein a portion of the conductive layer between the first gap and second gap forms a tooth in a gear structure.

### Claim 29 (depends on 26)

The semiconductor device of claim 26, further including:
an electrical component disposed in a die attach area over a first surface of the substrate; and
a shielding layer disposed over the electrical component.

### Claim 30 (depends on 29)

The semiconductor device of claim 29, further including an encapsulant deposited over the substrate and electrical component.

### Claim 31 (depends on 26)

The semiconductor device of claim 26, wherein a side surface of the first conductive via has a greater exposed surface area than a side surface of the second conductive via.