Semiconductor packages and related methods

A semiconductor package, comprising:

• a first metal-insulator-metal (MIM) substrate comprising a first insulator layer coupled with a first metallic layer, the first metallic layer comprising a recess therein;
• a semiconductor die mechanically coupled at least partially within the recess, a perimeter of the semiconductor die located entirely within a perimeter of the recess;
• a second MIM substrate comprising a second metallic layer coupled with a second insulator layer, the second metallic layer mechanically coupled with the semiconductor die;
• and
• an encapsulant at least partially encapsulating the first insulator layer, the first metallic layer, the semiconductor die, the second insulator layer, and the second metallic layer;
• wherein the first MIM substrate and the second MIM substrate are exposed through the encapsulant.

A semiconductor package, comprising:

• a first metal-insulator-metal (MIM) substrate comprising a first insulator layer coupled with a first metallic layer, the first metallic layer comprising a recess therein;
• a semiconductor die mechanically coupled at least partially within the recess, a perimeter of the semiconductor die located entirely within a perimeter of the recess;
• a second MIM substrate comprising a second metallic layer coupled with a second insulator layer, the second metallic layer mechanically coupled with the semiconductor die;
• and
• an encapsulant at least partially encapsulating the first insulator layer, the first metallic layer, the semiconductor die, the second insulator layer, and the second metallic layer;
• wherein the semiconductor die is directly coupled to the first metallic layer through one of a first soldered metal or a first sintered metal, and wherein the semiconductor die is directly coupled to the second metallic layer through one of a second soldered metal or a second sintered metal.