# US 12,765,369 B2 · Method of forming semiconductor package

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- Number: US 12,765,369 B2
- Document ID: US12765369B2
- Status: Granted
- Kind: B2
- Application number: 18/751,362
- Filed: 2024-06-24
- Published: 2024-10-17
- Granted: 2026-10-13
- Earliest claimed: 2019-08-29
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Jie Chen; Hsien-Wei Chen; Ming-Fa Chen
- Web page: https://patentgrep.com/patent/US12765369B2

## CPC

- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10W 20/42: Vias, e.g. via plugs
- H10W 72/90: Bond pads, in general
- H10W 74/131: {the semiconductor body being only partially enclosed}
- H10W 90/00: Package configurations
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming a semiconductor package includes the following steps. A first die is provided, wherein the first die comprises a plurality of first conductive patterns. A plurality of second conductive patterns are formed over the first die, wherein the second conductive patterns are connected to the first conductive patterns to form a first coil and a second coil surrounding the first coil.

## Claims

### Claim 1

A method of forming a semiconductor package, comprising:
forming a plurality of first conductive patterns over a semiconductor substrate along a first direction; and
forming a plurality of second conductive patterns stacked over the first conductive patterns along the first direction, wherein the second conductive patterns are connected to the first conductive patterns to form a first coil and a second coil surrounding the first coill, the first coil has a first total height extended along the first direction, the second coil has a second total height along the first direction, and the second total height is different from the first total height.

### Claim 2 (depends on 1)

The method as claimed in claim 1, further comprising a device under the first conductive patterns.

### Claim 3 (depends on 1)

The method as claimed in claim 1, wherein forming the second conductive patterns comprises:
forming through vias; and
forming first horizontally extended conductive features and first vertically extended conductive features electrically connected to the through vias.

### Claim 4 (depends on 3)

The method as claimed in claim 3, further comprising forming an encapsulant to encapsulate the through vias before forming the first horizontally extended conductive features and the first vertically extended conductive features.

### Claim 5 (depends on 3)

The method as claimed in claim 3, further comprising:
placing a die aside the second conductive patterns; and
forming second horizontally extended conductive features and second vertically extended conductive features electrically connected to the die.

### Claim 6 (depends on 5)

The method as claimed in claim 5, wherein the second horizontally extended conductive features and second vertically extended conductive features are formed simultaneously with the first horizontally extended conductive features and first vertically extended conductive features.

### Claim 7 (depends on 5)

The method as claimed in claim 5, further comprising:
forming a passivation layer over the first and second horizontally extended conductive features;
forming an under-bump metallurgy (UBM) layer in the passivation layer; and
forming a conductive connector on the UBM layer.

### Claim 8

A method of forming a semiconductor package, comprising:
forming a plurality of first conductive layers and a plurality of first conductive vias alternately stacked along a first direction;
forming a plurality of through vias over the first conductive layers and the first conductive vias; and
forming a plurality of second conductive layers and a plurality of second conductive vias over the through vias,
wherein the through vias, the first conductive layers, the first conductive vias, the second conductive layers and the second conductive vias are connected to form an inductor having a first coil and a second coil surrounding the first coil, and the first coil and the second coil are around an axis substantially perpendicular to the first direction.

### Claim 9 (depends on 8)

The method as claimed in claim 8, further comprising forming a first dielectric layer to encapsulate the first conductive layers and the first conductive vias.

### Claim 10 (depends on 9)

The method as claimed in claim 9, further comprising forming a first bonding pad and a first bonding via aside the first conductive layers and the first conductive vias, wherein the first dielectric layer further encapsulates the first bonding pad and the first bonding via.

### Claim 11 (depends on 10)

The method as claimed in claim 10, further comprising forming a conductive pad aside the first bonding via, wherein the first dielectric layer further encapsulates the conductive pad.

### Claim 12 (depends on 10)

The method as claimed in claim 10, wherein some of the first conductive layers are formed simultaneously with the first bonding pad and some of the first conductive vias are formed simultaneously with the first bonding via.

### Claim 13 (depends on 10)

The method as claimed in claim 10, further comprising bonding a second bonding pad of a die onto the first bonding pad.

### Claim 14 (depends on 13)

The method as claimed in claim 13, further comprising forming an encapsulant to encapsulate the die and the through vias.

### Claim 15 (depends on 13)

The method as claimed in claim 13, wherein the second conductive layers and the second conductive vias are formed over the encapsulant.

### Claim 16

A method of forming a semiconductor package, comprising:
providing a first die;
stacking a second die on the first die along a first direction;
forming a first inductor over the first die, the first inductor comprising a plurality of first coils around a first axis, wherein the first axis is substantially perpendicular to the first direction, and one of the first coils surrounds another one of the first coils; and
forming a second inductor over the first die, wherein the second inductor includes a plurality of second coils around a second axis, wherein the first inductor and the second inductor are physically separated.

### Claim 17 (depends on 16)

The method as claimed in claim 16, wherein the second axis is substantially perpendicular to the first direction.

### Claim 18 (depends on 16)

The method as claimed in claim 16, wherein the first inductor and the second inductor are disposed at different sides of the second die.

### Claim 19 (depends on 16)

The method as claimed in claim 16, wherein the first inductor and the second inductor are disposed at opposite sides of the second die.

### Claim 20 (depends on 16)

The method as claimed in claim 16, wherein the second axis is different from the first axis.
