Semiconductor devices and data storage systems including the same

A semiconductor device comprising:

• a substrate comprising a first region and a second region;
• insulating patterns in the substrate;
• gate electrodes provided below the substrate and spaced apart from each other in a first direction that is perpendicular to a lower surface of the substrate, the gate electrodes comprising pad regions arranged in a step shape below the second region;
• gate contact plugs passing through the pad regions of the gate electrodes, extending in the first direction, and vertically overlapping the insulating patterns;
• and
• a peripheral contact plug provided in an outer area of the substrate and extending from a level lower than a level of a lowermost gate electrode of the gate electrodes to a level higher than the lower surface of the substrate;
• and
• conductive patterns including a first conductive pattern provided on and connected to the peripheral contact plug, and second conductive patterns provided on and connected to the substrate.

A data storage system comprising:

• a first semiconductor structure comprising a first substrate, circuit elements provided on the first substrate, and a lower interconnection structure connected to the circuit elements;
• a semiconductor storage device comprising a second semiconductor structure provided on the first semiconductor structure and connected to the first semiconductor structure, and an input/output pad connected to the circuit elements;
• and
• a controller connected to the semiconductor storage device through the input/output pad, and configured to control the semiconductor storage device,
• wherein the second semiconductor structure comprises:
• a second substrate comprising a first region and a second region;
• insulating patterns provided in the second substrate;
• gate electrodes provided between the second substrate and the first semiconductor structure and spaced apart from each other in a first direction that is perpendicular to a lower surface of the second substrate;
• a channel structure provided below the first region of the second substrate, penetrating through the gate electrodes and extending in the first direction, the channel structure comprising a channel layer;
• gate contact plugs passing through the gate electrodes, extending in the first direction, extending into the insulating patterns respectively, and spaced apart from the second substrate by the insulating patterns;
• and
• a source contact plug connected to the second substrate and extending from a level lower than a level of a lowermost gate electrode closest to the first semiconductor structure, among the gate electrodes, to an inside of the second substrate.