Glass substrates having partially embedded conductive layers for power delivery in semiconductor packages and related methods

A semiconductor package comprising:

• a first layer of first traces, a first trace of the first traces having a first length along a first elongate path in a plane of the first layer, the first trace having a first thickness measured in a direction substantially perpendicular to the plane, the first length multiple times greater than the first thickness;
• a second layer of second traces;
• a core layer between the first layer and the second layer, the core layer having a first surface oriented toward the first layer and substantially parallel to the plane of the first layer, the core layer having a second surface oriented toward the second layer, the second surface opposite the first surface, the core layer including a recessed channel along the first surface, the recessed channel having a first depth extending substantially perpendicular to the first surface;
• and
• a first metal in the recessed channel, the first metal having a second length along a second elongate path corresponding to a shape of the recessed channel, the first metal having a second thickness measured in a direction substantially perpendicular to the first surface, the second elongate path to align with the first elongate path such that the first trace is in contact with the first metal along the second length to define a first power line corresponding to both the first metal and the first trace, the first power line having a third thickness defined by the first thickness of the first trace and the second thickness of the first metal, a second trace of the first traces extending along the first surface of the core layer in the plane of the first layer, the second trace in contact with the core layer and spaced apart from metal in the core layer between the first and second surfaces.