# US 12,765,267 B2 · Semiconductor device including magnetic tunnel junction structure > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,765,267 B2 - Document ID: US12765267B2 - Status: Granted - Kind: B2 - Application number: 18/538,378 - Filed: 2023-12-13 - Published: 2025-01-02 - Granted: 2026-10-13 - Earliest claimed: 2023-06-29 - Assignees: SK Hyinx Inc. - Applicants: SK hynix Inc. - Inventors: Soo Man Seo - Web page: https://patentgrep.com/patent/US12765267B2 ## CPC - H10N 50/20: Spin-polarised current-controlled devices (magnetoresistive devices H10N50/10) - H01F 10/3272: {by use of anti-parallel coupled [APC] ferromagnetic layers, e.g. artificial ferrimagnets [AFI], artificial [AAF] or synthetic [SAF] anti-ferromagnets} - H01F 10/3286: {Spin-exchange coupled multilayers having at least one layer with perpendicular magnetic anisotropy} - H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices - H01F 10/3254: {the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]} - H01F 10/329: {Spin-exchange coupled multilayers wherein the magnetisation of the free layer is switched by a spin-polarised current, e.g. spin torque effect} - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR - H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES - H10B: ELECTRONIC MEMORY DEVICES ## Abstract In an embodiment, a semiconductor device includes a spin orbit torque (SOT) line extending in a first direction; an electrode layer spaced apart from the SOT line in a third direction; and a magnetic tunnel junction structure interposed between the SOT line and the electrode layer, and including a free layer adjacent to the SOT line in the third direction, a pinned layer adjacent to the electrode layer in the third direction, and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein the magnetic tunnel junction structure includes a first portion overlapping the SOT line and a second portion not overlapping the SOT line in a second direction, the electrode layer overlaps at least a portion of the second portion, and a thickness of the free layer in the first portion is greater than a thickness of the free layer in the second portion. ## Claims ### Claim 1 A semiconductor device comprising: one or more first conductive lines extending in a first direction to carry a current through the one or more first conductive lines; one or more electrode layers, each electrode layer spaced apart from a corresponding first conductive line in a third direction crossing the first direction; and one or more magnetic tunnel junction structures, each magnetic tunnel junction structure interposed between a corresponding first conductive line and a corresponding electrode layer, each of the one or more magnetic tunnel junction structures including a free layer, a pinned layer, and a tunnel barrier layer stacked in the third direction, the free layer disposed adjacent to the corresponding first conductive line, the pinned layer disposed adjacent to the corresponding electrode layer, the tunnel barrier layer interposed between the free layer and the pinned layer, wherein each of the one or more magnetic tunnel junction structures includes a first portion that overlaps the corresponding first conductive line and a second portion that does not overlap the corresponding first conductive line, each magnetic tunnel junction structure extending in a second direction crossing the first and third directions, the corresponding electrode layer overlaps at least partially the second portion of a corresponding magnetic tunnel junction structure, and a thickness of the free layer in the first portion is greater than a thickness of the free layer in the second portion of the corresponding magnetic tunnel junction structure. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein a resistance state of each magnetic tunnel junction structure is switched by: a spin orbit torque (SOT) method that switches the resistance state of each magnetic tunnel junction structure using a current flowing through the corresponding first conductive line; and a spin transfer torque (STT) method that switches the resistance state of each magnetic tunnel junction structure using a current flowing through each magnetic tunnel junction structure from the corresponding electrode layer. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein each of the corresponding magnetic tunnel junction structure and the corresponding electrode layer has a pillar shape. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, wherein a length of the corresponding magnetic tunnel junction structure in the first direction is smaller than a length in the second direction. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the pinned layer of the corresponding magnetic tunnel junction structure has a line shape extending in the second direction, and each of the free layer of the corresponding magnetic tunnel junction structure and the corresponding electrode layer has a pillar shape. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the one or more first conductive lines include a plurality of first conductive lines arranged in the second direction, and the corresponding magnetic tunnel junction structure and the corresponding electrode layer are connected to one of the plurality of first conductive lines. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, wherein the one or more first conductive lines include a plurality of first conductive lines arranged in the second direction, the one or more magnetic tunnel junction structures include a plurality of magnetic tunnel junction structures arranged to be spaced apart from each other in the first direction and respectively connected to the plurality of first conductive lines, and the one or more electrode layers include a plurality of electrode layers respectively connected to the plurality of magnetic tunnel junction structures. ### Claim 8 (depends on 1) The semiconductor device according to claim 1, wherein each magnetic tunnel junction structure further includes: an additional pinned layer interposed between the pinned layer and the corresponding electrode layer and anti-ferromagnetically coupled to the pinned layer; and a non-magnetic material layer interposed between the additional pinned layer and the pinned layer. ### Claim 9 (depends on 1) The semiconductor device according to claim 1, further comprising: a magnetic loss layer in contact with the free layer in the second portion of each magnetic tunnel junction structure, in the third direction. ### Claim 10 (depends on 9) The semiconductor device according to claim 9, wherein the magnetic loss layer includes at least one of: a constituent element of the free layer; an element that causes loss of a magnetic property of the free layer, or oxygen. ### Claim 11 (depends on 9) The semiconductor device according to claim 9, wherein a thickness of the free layer in the first portion of each magnetic tunnel junction structure is equal to a sum of a thickness of the free layer in the second portion of each magnetic tunnel junction structure and a thickness of the magnetic loss layer. ### Claim 12 (depends on 1) The semiconductor device according to claim 1, further comprising: one or more selector layers, each selector layer interposed between a corresponding pinned layer and a corresponding electrode layer. ### Claim 13 (depends on 1) The semiconductor device according to claim 1, a sum of a thickness of the pinned layer in the first portion of each magnetic tunnel junction structure is smaller than a thickness of the pinned layer in the second portion of each magnetic tunnel junction structure. ### Claim 14 (depends on 13) The semiconductor device according to claim 13, wherein a sum of a thickness of the free layer, a thickness of the tunnel barrier layer, a thickness of the pinned layer in the first portion of each magnetic tunnel junction structure is equal to a sum of a thickness of the free layer, a thickness of the tunnel barrier layer, and a thickness of the pinned layer in the second portion of each magnetic tunnel junction structure. ### Claim 15 (depends on 1) The semiconductor device according to claim 1, wherein a thickness of the pinned layer in the first portion of each magnetic tunnel junction structure is equal to a thickness of the pinned layer in the second portion of each magnetic tunnel junction structure. ### Claim 16 (depends on 1) The semiconductor device according to claim 1, wherein each of the free layer and the pinned layer has a magnetization direction parallel to the third direction. ### Claim 17 (depends on 1) The semiconductor device according to claim 1, wherein the free layer includes a first surface facing the pinned layer, and the pinned layer includes a second surface facing the free layer, wherein the first surface and the second surface in each of the first portion and the second portion of each magnetic tunnel junction structure are parallel to a plane formed by an axis corresponding to the first direction and another axis corresponding to the second direction, and at a boundary between the first portion and the second portion of each magnetic tunnel junction structure, the first surface and the second surface are parallel to the third direction. ### Claim 18 (depends on 17) The semiconductor device according to claim 17, wherein the tunnel barrier layer includes a third surface facing the first surface or the second surface, wherein the third surface in each of the first portion and the second portion is parallel to the plane, and at the boundary between the first portion and the second portion of each magnetic tunnel junction structure, the third surface is parallel to the third direction. ### Claim 19 (depends on 1) The semiconductor device according to claim 1, wherein the free layer includes a first surface located opposite to a surface facing the pinned layer, and the pinned layer has a second surface facing the free layer, wherein the first surface in each of the first portion and the second portion of each magnetic tunnel junction structure is parallel to a plane formed by an axis corresponding to the first direction and another axis corresponding to the second direction, and the first surface at a boundary between the first portion and the second portion is parallel to the third direction, and the second surface is parallel to the plane. ### Claim 20 (depends on 19) The semiconductor device according to claim 19, wherein the tunnel barrier layer has a third surface facing the second surface, and the third surface is parallel to the plane.