# US 12,765,172 B2 · Display substrate with sub-pixels and driving transistors arranged to reduce degradation, display panel and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,765,172 B2 - Document ID: US12765172B2 - Status: Granted - Kind: B2 - Application number: 17/790,349 - Filed: 2021-07-20 - Published: 2024-05-30 - Granted: 2026-10-13 - Earliest claimed: 2021-07-20 - Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd. - Inventors: Xin Mou; Yuhsiung Feng; Hongting Lu - Web page: https://patentgrep.com/patent/US12765172B2 ## CPC - H10K 59/1213: {the pixel elements being TFTs} - G02F 1/134309: {characterised by their geometrical arrangement} - G02F 1/136286: {Wiring, e.g. gate line, drain line} - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - H10K 59/1216: {the pixel elements being capacitors} - H10K 59/122: Pixel-defining structures or layers, e.g. banks - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K 59/35: comprising red-green-blue [RGB] subpixels - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS ## Abstract The present application provides a display substrate, a display panel and a display device. An orthographic projection of the pixel opening of the first color sub-pixel of the display substrate on the base substrate, an orthographic projection of the pixel opening of the second color sub-pixel on the base substrate, and an orthographic projection of the pixel opening of the third color sub-pixel on the base substrate all have no overlap with the orthographic projections of the channel of the driving transistors thereof on the base substrate respectively. Alternatively, an orthographic projection of the pixel opening of at least one sub-pixel on the base substrate has overlap with an orthographic projection of the channel of the driving transistor thereof on the base substrate, an orthographic projection of the pixel opening of at least one of the second color sub-pixels in a first direction has overlap with an orthographic projection of the pixel opening of the first color sub-pixel in the first direction and an orthographic projection of the pixel opening of the third color sub-pixel in the first direction, and the orthographic projection of the pixel opening of the second color sub-pixel in a second direction has no overlap with either an orthographic projection of the pixel opening of the first color sub-pixel in the second direction or an orthographic projection of the pixel opening of the third color sub-pixel in the second direction, where the first direction intersects with the second direction. ## Claims ### Claim 1 A display substrate comprising a base substrate and a plurality of sub-pixels disposed on the base substrate; wherein the plurality of sub-pixels comprises a plurality of first color sub-pixels, a plurality of second color sub-pixels and a plurality of third color sub-pixels, human eyes are more sensitive to a first color of light emitted from the first color sub-pixels than to a third color of light emitted from the third color sub-pixels, and the human eyes are more sensitive to the third color than to a second color of light emitted from the second color sub-pixels; each of the sub-pixels comprises an organic light emitting element and a pixel circuit for driving the organic light emitting element; the organic light emitting element comprises a first electrode, a second electrode, and an organic light emitting material disposed between the first electrode and the second electrode; the first electrode of the sub-pixel is electrically connected to the pixel circuit; the pixel circuit comprises a driving transistor; the display substrate further comprises an active semiconductor layer and a pixel defining layer, the active semiconductor layer comprises channels and source and drain regions of the driving transistors of the sub-pixels; the pixel defining layer is provided with pixel openings corresponding to the sub-pixels one to one, wherein the plurality of sub-pixels are divided into a plurality of pixel groups, and each of the pixel groups comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; each of at least one of the pixel groups comprises two rows of sub-pixels arranged along a first direction, wherein one row of the two rows of sub-pixels arranged along the first direction comprises the first color sub-pixel and the third color sub-pixel, and the other row of the two rows of sub-pixels arranged along the first direction comprises the second color sub-pixel, wherein an orthographic projection of a pixel opening of the first color sub-pixel on the base substrate has no overlap with an orthographic projection of a channel of a driving transistor of the first color sub-pixel on the base substrate, an orthographic projection of a pixel opening of the second color sub-pixel on the base substrate has no overlap with an orthographic projection of a channel of a driving transistor of the second color sub-pixel on the base substrate, and an orthographic projection of a pixel opening of the third color sub-pixel on the base substrate has no overlap with an orthographic projection of a channel of a driving transistor of the third color sub-pixel on the base substrate, wherein in each of the at least one of the pixel groups, an orthographic projection of the pixel opening of the second color sub-pixel on a dummy straight line extending along the first direction has overlap with an orthographic projection of the pixel opening of the first color sub-pixel on the dummy straight line extending along the first direction and an orthographic projection of the pixel opening of the third color sub-pixel on the dummy straight line extending along the first direction, and an orthographic projection of the pixel opening of the second color sub-pixel on a dummy straight line extending along a second direction has no overlap with either an orthographic projection of the pixel opening of the first color sub-pixel on the dummy straight line extending along the second direction or an orthographic projection of the pixel opening of the third color sub-pixel on the dummy straight line extending along the second direction, wherein the first direction is perpendicular to the second direction, and wherein a size of the pixel opening of the second color sub-pixel along the first direction is greater than a size of the pixel opening of the first color sub-pixel along the first direction and a size of the pixel opening of the third color sub-pixel along the first direction. ### Claim 2 (depends on 1) The display substrate according to claim 1, wherein, in at least one of the pixel groups, an orthographic projection of a pixel opening corresponding to each of the sub-pixels on the base substrate has no overlap with an orthographic projection of a gate electrode of a driving transistor of any one of the sub-pixels on the base substrate, or the orthographic projection of the pixel opening corresponding to each of the sub-pixels on the base substrate has an overlapping region with the orthographic projection of the gate electrode of the driving transistor of any one of the sub-pixels on the base substrate, and a ratio of an area of the overlapping region to an area of the gate electrode is not more than 10%. ### Claim 3 (depends on 1) The display substrate according to claim 1, wherein the display substrate is further provided with scan signal lines extending along the first direction, the scan signal lines being configured to provide scan signals for the pixel groups; in at least one of the pixel groups, an orthographic projection of a corresponding scan signal line of the scan signal lines on a dummy straight line extending along the second direction has overlap with an orthographic projection of a gate electrode of the driving transistor of at least one of the sub-pixels on the dummy straight line extending along the second direction, where the second direction is perpendicular to the first direction. ### Claim 4 (depends on 1) The display substrate according to claim 1, wherein the display substrate is further provided with scan signal lines extending along the first direction, the scan signal lines being configured to provide scan signals for the pixel groups; each of at least one of the scan signal lines comprises a main body portion and a protruding portion protruding from one side of the main body portion of the scan signal line; the main body portion of the scan signal line comprises a first scan sub-line, a second scan sub-line and a connection part, the first scan sub-line is connected to the second scan sub-line through the connection part, the first scan sub-line is connected to a pixel circuit of the first color sub-pixel, the second scan sub-line is connected to a pixel circuit of the second color sub-pixel, and an extension direction of part of the connection part intersects with an extension direction of the first scan sub-line; the pixel circuit further comprises a compensation transistor, and the compensation transistor comprises a first gate electrode and a second gate electrode; in the compensation transistor, the first gate electrode is a part of the connection part that overlaps with an orthographic projection of the active semiconductor layer on the base substrate, and the second gate electrode is a part of the protruding portion that overlaps the orthographic projection of the active semiconductor layer on the base substrate. ### Claim 5 (depends on 4) The display substrate according to claim 4, wherein the connection part comprises a first connection sub-part, a second connection sub-part and a third connection sub-part which are connected in sequence, extension directions of the first connection sub-part and the third connection sub-part intersect with the extension direction of the first scan sub-line, and an extension direction of the second connection sub-part is the same as the extension direction of the first scan sub-line; the first gate electrode is a part of the second connection sub-part that overlaps with the orthographic projection of the active semiconductor layer on the base substrate, wherein the first connection sub-part comprises a first end connected to the first scan sub-line and a second end connected to the second connection sub-part, the third connection sub-part comprises a third end connected to the second scan sub-line and a fourth end connected to the second connection sub-part, wherein the first end and the third end are separated from each other by a predetermined distance in the first direction. ### Claim 6 (depends on 4) The display substrate according to claim 4, wherein the active semiconductor layer comprises a first section, a second section, a third section and a fourth section which are connected in sequence; the second section, the fourth section and the main body portion of the scan signal line extend along the first direction, the first section and the third section extend in the second direction; the display substrate further comprises a reset control signal line extending along the first direction and disposed in the same layer as the scan signal line; the pixel circuit further comprises a reset transistor, and the reset transistor comprises a gate electrode; the second gate electrode is a part of the protruding portion that overlaps with an orthographic projection of the fourth section on the base substrate, the gate electrode of the reset transistor comprises a part of the reset control signal line that overlaps with an orthographic projection of the first section on the base substrate. ### Claim 7 (depends on 4) The display substrate according to claim 4, wherein the pixel circuit further comprises a threshold compensation transistor, the threshold compensation transistor comprises a gate electrode; the display substrate further comprises a connection structure, one end of the connection structure is connected to a gate electrode of the driving transistor, and the other end of the connection structure is connected to source and drain regions of the threshold compensation transistor; the connection structure comprises a first portion and a second portion connected to the first portion, an orthographic projection of the first portion on the base substrate and an orthographic projection of the protruding portion on the base substrate are disposed at the same side of an orthographic projection of the main body portion of the scan signal line on the base substrate; a length of the first portion in the second direction is larger than a length of the protruding portion in the second direction. ### Claim 8 (depends on 7) The display substrate according to claim 7, wherein a size of the connection structure in the second direction ranges from 35 μm to 70 μm. ### Claim 9 (depends on 1) The display substrate according to claim 1, wherein the display substrate is further provided with a plurality of scan signal lines and a plurality of reset control signal lines extending along the first direction, the scan signal lines being configured to provide scan signals for the pixel groups, the reset control signal lines being configured to provide reset control signals for the pixel groups; an orthographic projection of a first electrode of at least one of the second color sub-pixels on the base substrate has overlap with an orthographic projection of a corresponding reset control signal line of the reset control signal lines on the base substrate and an orthographic projection of a corresponding scan signal line of the scan signal lines on the base substrate. ### Claim 10 (depends on 1) The display substrate according to claim 1, wherein any one of the orthographic projection of the pixel opening of the first color sub-pixel on the base substrate, the orthographic projection of the pixel opening of the second color sub-pixel on the base substrate or the orthographic projection of the pixel opening of the third color sub-pixel on the base substrate has no overlap with any one of the orthographic projection of the channel of the driving transistor of the first color sub-pixel on the base substrate, the orthographic projection of the channel of the driving transistor of the second color sub-pixel on the base substrate, or the orthographic projection of the channel of the driving transistor of the third color sub-pixel on the base substrate. ### Claim 11 (depends on 10) The display substrate according to claim 10, wherein the display substrate is further provided with scan signal lines, the scan signal lines being configured to provide scan signals for the pixel groups; a distance between the channel of the driving transistor of at least one of the sub-pixels and a corresponding scan signal line of the scan signal lines in the second direction ranges from 1 μm to 50 μm. ### Claim 12 (depends on 1) The display substrate according to claim 1, wherein the pixel circuit further comprises a capacitor, and the capacitor comprises a first polar plate and a second polar plate disposed on a side of the first polar plate away from the base substrate; in at least one of the pixel groups, an area of a second polar plate of the second color sub-pixel is larger than an area of a second polar plate of the first color sub-pixel, and the area of the second polar plate of the second color sub-pixel is larger than an area of a second polar plate of the third color sub-pixel. ### Claim 13 (depends on 1) The display substrate according to claim 1, wherein the display substrate further comprises a first power supply line and a second power supply line disposed on a side of the first power supply line away from the base substrate; the first power supply line and the second power supply line are configured to provide a power supply signal for the pixel circuit; the first power supply line is electrically connected to the second power supply line; the second power supply line comprises a first power supply sub-line extending along the first direction and a second power supply sub-line extending along the second direction, the first power supply sub-line intersecting with the second power supply sub-line. ### Claim 14 (depends on 1) A display panel, comprising the display substrate according to claim 1. ### Claim 15 (depends on 14) A display device, comprising the display panel according to claim 14. ### Claim 16 A display substrate comprising a base substrate and a plurality of sub-pixels disposed on the base substrate; wherein the plurality of sub-pixels comprises a plurality of first color sub-pixels, a plurality of second color sub-pixels and a plurality of third color sub-pixels, human eyes are more sensitive to a first color of light emitted from the first color sub-pixels than to a third color of light emitted from the third color sub-pixels, and the human eyes are more sensitive to the third color than to a second color of light emitted from the second color sub-pixels; each of the sub-pixels comprises an organic light emitting element and a pixel circuit for driving the organic light emitting element; the organic light emitting element comprises a first electrode, a second electrode, and an organic light emitting material disposed between the first electrode and the second electrode; the first electrode of the sub-pixel is electrically connected to the pixel circuit; the pixel circuit comprises a driving transistor; the display substrate further comprises an active semiconductor layer and a pixel defining layer, the active semiconductor layer comprises channels and source and drain regions of the driving transistors of the sub-pixels; the pixel defining layer is provided with pixel openings corresponding to the sub-pixels one to one, wherein the plurality of sub-pixels are divided into a plurality of pixel groups, and each of the pixel groups comprises a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; each of at least one of the pixel groups comprises two rows of sub-pixels arranged along a first direction, wherein one row of the two rows of sub-pixels arranged along the first direction comprises the first color sub-pixel and the third color sub-pixel, and the other row of the two rows of sub-pixels arranged along the first direction comprises the second color sub-pixel, wherein an orthographic projection of a pixel opening of at least one of the sub-pixels on the base substrate has overlap with an orthographic projection of a channel of a driving transistor thereof on the base substrate, and wherein in each of the at least one of the pixel groups, an orthographic projection of a pixel opening of the second color sub-pixel on a dummy straight line extending along the first direction has overlap with an orthographic projection of a pixel opening of the first color sub-pixel on the dummy straight line extending along the first direction and an orthographic projection of a pixel opening of the third color sub-pixel on the dummy straight line extending along the first direction, and an orthographic projection of the pixel opening of the second color sub-pixel on a dummy straight line extending along a second direction has no overlap with either an orthographic projection of the pixel opening of the first color sub-pixel on the dummy straight line extending along the second direction or an orthographic projection of the pixel opening of the third color sub-pixel on the dummy straight line extending along the second direction, wherein the first direction is perpendicular to the second direction, wherein a size of the pixel opening of the second color sub-pixel along the first direction is greater than a size of the pixel opening of the first color sub-pixel along the first direction and a size of the pixel opening of the third color sub-pixel along the first direction. ### Claim 17 (depends on 16) The display substrate according to claim 16, wherein an orthographic projection of the pixel opening of the first color sub-pixel on the base substrate has overlap with an orthographic projection of a channel of a driving transistor of the first color sub-pixel on the base substrate, an orthographic projection of the pixel opening of the second color sub-pixel on the base substrate has overlap with an orthographic projection of a channel of a driving transistor of the second color sub-pixel on the base substrate, and an orthographic projection of the pixel opening of the third color sub-pixel on the base substrate has overlap with an orthographic projection of a channel of a driving transistor of the third color sub-pixel on the base substrate. ### Claim 18 (depends on 16) The display substrate according to claim 16, wherein the display substrate is further provided with a plurality of scan signal lines extending along the first direction, the scan signal lines being configured to provide scan signals for the pixel groups; in at least one of the pixel groups, in the second direction, a distance from a channel of a driving transistor of the second color sub-pixel to a corresponding scan signal line of the scan signal lines is different from a distance from a channel of a driving transistor of the first color sub-pixel to the corresponding scan signal line. ### Claim 19 (depends on 18) The display substrate according to claim 18, wherein, in at least one of the pixel groups, in the second direction, the distance from the channel of the driving transistor of the second color sub-pixel to the corresponding scan signal line is longer than the distance from the channel of the driving transistor of the first color sub-pixel to the corresponding scan signal line. ### Claim 20 (depends on 16) The display substrate according to claim 16, wherein the pixel circuit further comprises an emission control transistor and an electrode connection structure, and the electrode connection structure electrically connects the first electrode of the sub-pixel to source and drain regions of the emission control transistor; areas of the electrode connection structures of at least two of the sub-pixels are different, the electrode connection structure at least comprises a first electrode connection sub-structure and a second electrode connection sub-structure on a side of the first electrode connection sub-structure away from the base substrate; areas of the first electrode connection sub-structure and/or the second electrode connection sub-structure of at least two of the sub-pixels are different.