# US 12,765,072 B2 · Integrated circuit and method of manufacturing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,765,072 B2 - Document ID: US12765072B2 - Status: Granted - Kind: B2 - Application number: 18/188,937 - Filed: 2023-03-23 - Published: 2024-07-04 - Granted: 2026-10-13 - Earliest claimed: 2022-12-28 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Company, Ltd. - Inventors: Tao-Yi Hung; Jam-Wem Lee; Kuo-Ji Chen; Wun-Jie Lin - Web page: https://patentgrep.com/patent/US12765072B2 ## CPC - H10D 89/811: {using FETs as protective elements} - H10D 84/0149: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10W 20/427: {Power or ground buses} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An integrated circuit (IC) device includes an antenna effect protection device, and a to-be-protected device. A first source/drain of the antenna effect protection device is electrically coupled to a first conductor configured to carry a reference voltage. A second source/drain of the antenna effect protection device is electrically coupled by a second conductor to a gate of the to-be-protected device. The antenna effect protection device is a bulk-less device. ## Claims ### Claim 1 An integrated circuit (IC) device, comprising: an antenna effect protection device; and a to-be-protected device, wherein a first source/drain of the antenna effect protection device is electrically coupled to a first conductor configured to carry a reference voltage, a second source/drain of the antenna effect protection device is electrically coupled by a second conductor to a gate of the to-be-protected device, and the antenna effect protection device is a bulk-less device, and is configured to: in response to a reversed bias applied between the first source/drain and the second source/drain of the antenna effect protection device, discharge electric charges of a first polarity on the second conductor to the first conductor through a leakage current of the antenna effect protection device. ### Claim 2 (depends on 1) The IC device of claim 1, wherein a gate of the antenna effect protection device is electrically coupled to the first conductor. ### Claim 3 (depends on 1) The IC device of claim 1, further comprising: a further antenna effect protection device, wherein a gate of the antenna effect protection device is electrically coupled to a source/drain of the further antenna effect protection device. ### Claim 4 (depends on 1) The IC device of claim 1, wherein the to-be-protected device is a bulk-less device. ### Claim 5 (depends on 1) The IC device of claim 1, further comprising: an insulation layer having a front side and a back side opposite to the front side, wherein the to-be-protected device, the antenna effect protection device and the first conductor are over the front side of the insulation layer; and a conductive structure extending through the insulation layer, and electrically coupling the first conductor on the front side to the back side of the insulation layer. ### Claim 6 (depends on 5) The IC device of claim 5, further comprising: a semiconductor layer over the back side of the insulation layer, the semiconductor layer electrically coupled to the first conductor through the conductive structure. ### Claim 7 (depends on 5) The IC device of claim 5, further comprising: a back side metal layer over the back side of the insulation layer, the back side metal layer electrically coupled to the first conductor through the conductive structure. ### Claim 8 (depends on 7) The IC device of claim 7, wherein the back side metal layer comprises a back side power rail electrically coupled to the first conductor through the conductive structure. ### Claim 9 (depends on 5) The IC device of claim 5, wherein the conductive structure comprises: an epitaxy structure over the front side of the insulation layer, and electrically coupled to the first conductor, and a feed through via extending through the insulation layer, and electrically coupling the epitaxy structure to the back side of the insulation layer. ### Claim 10 (depends on 9) The IC device of claim 9, wherein the epitaxy structure comprises a substrate tap or a well tap located outside the antenna effect protection device and the to-be-protected device. ### Claim 11 (depends on 9) The IC device of claim 9, wherein the epitaxy structure comprises the first source/drain of the antenna effect protection device. ### Claim 12 (depends on 1) The IC device of claim 1, wherein the antenna effect protection device is further configured to: in response to a forward bias applied between the first source/drain and the second source/drain of the antenna effect protection device, discharge electric charges of a second polarity on the second conductor to the first conductor through a channel current of the antenna effect protection device, the second polarity opposite to the first polarity. ### Claim 13 An integrated circuit (IC) device, comprising: a first power domain; a second power domain; a first antenna effect protection device in the first power domain; a second antenna effect protection device in the second power domain, wherein a gate of the second antenna effect protection device is electrically coupled to a source/drain of the first antenna effect protection device; and a first functional device in the second power domain, wherein a gate of the first functional device is electrically coupled to a source/drain of the second antenna effect protection device. ### Claim 14 (depends on 13) The IC device of claim 13, further comprising: a second functional device in the first power domain; and a third antenna effect protection device in the first power domain, wherein a gate of the second functional device is electrically coupled to a source/drain of the third antenna effect protection device. ### Claim 15 (depends on 13) The IC device of claim 13, wherein each of the first antenna effect protection device, the second antenna effect protection device and the first functional device is a bulk-less device. ### Claim 16 (depends on 15) The IC device of claim 15, wherein each of the first antenna effect protection device and the second antenna effect protection device is a grounded-gate n-channel metal-oxide semiconductor (GGNMOS), or a gate-VDD p-channel metal-oxide semiconductor (GDPMOS). ### Claim 17 (depends on 13) The IC device of claim 13, further comprising at least one of: a first power clamp circuit in the first power domain; a second power clamp circuit in the second power domain; a first electrostatic discharge (ESD) circuit electrically coupled between a first local power rail of the first power domain and a global power rail; a second ESD circuit electrically coupled between a second local power rail of the second power domain and the global power rail; or a third ESD circuit electrically coupled between the first local power rail and the second local power rail. ### Claim 18 An integrated circuit (IC) device, comprising: a first transistor and a second transistor over a front side of an insulation layer; and a redistribution structure over the first transistor and the second transistor, and electrically coupling a first source/drain of the first transistor to a gate of the second transistor, wherein at least one of a bottom of a first source/drain of the second transistor or a bottom of a second source/drain of the second transistor is over and in direct contact with the front side of the insulation layer, and wherein the IC device further comprises: a conductive feed through via extending through the insulation layer, and electrically coupled to a second source/drain of the first transistor; and a semiconductor layer on a back side of the insulation layer, the semiconductor layer electrically coupled to the second source/drain of the first transistor through the feed through via. ### Claim 19 (depends on 18) The IC device of claim 18, wherein: the feed through via is electrically coupled to the second source/drain of the first transistor and a gate of the first transistor. ### Claim 20 (depends on 18) The IC device of claim 18, wherein the redistribution structure comprises a conductor configured to carry a reference voltage, and electrically coupled to the second source/drain of the first transistor.