# US 12,765,052 B2 · Semiconductor device and method of fabricating the same

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- Number: US 12,765,052 B2
- Document ID: US12765052B2
- Status: Granted
- Kind: B2
- Application number: 18/430,902
- Filed: 2024-02-02
- Published: 2024-05-30
- Granted: 2026-10-13
- Earliest claimed: 2020-12-04
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Munhyeon Kim; Mingyu Kim; Doyoung Choi; Daewon Ha
- Web page: https://patentgrep.com/patent/US12765052B2

## CPC

- H10D 84/856: {the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device is disclosed. The semiconductor device may include an active pattern on a substrate, source/drain patterns on the active pattern, a fence spacer on side surfaces of each of the source/drain patterns, a channel pattern interposed between the source/drain patterns, a gate electrode crossing the channel pattern and extending in a first direction, and a gate spacer on a side surface of the gate electrode. A first thickness of an upper portion of the fence spacer in the first direction may be greater than a second thickness of the gate spacer in a second direction crossing the first direction.

## Claims

### Claim 1

A method of fabricating a semiconductor device, comprising:
forming active patterns extending in a second direction on a substrate;
forming sacrificial gate patterns crossing the active patterns and extending in a first direction;
forming a first spacer layer on side surfaces of the active patterns and side surfaces of the sacrificial gate patterns;
performing a first directional deposition process on the first spacer layer in the first direction and in a direction opposite to the first direction to form a second spacer layer on the first spacer layer;
removing portions of the active patterns that are exposed between the sacrificial gate patterns to form recesses between the sacrificial gate patterns;
forming source/drain patterns in the recesses; and
replacing the sacrificial gate patterns with gate electrodes.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first directional deposition process is an ion implantation directional deposition process, and the first directional deposition process comprises a first deposition process that is performed in the first direction, and a second deposition process that is performed in the direction opposite to the first direction.

### Claim 3 (depends on 2)

The method of claim 2, wherein the first deposition process is performed at a first angle relative to a top surface of the substrate, and the second deposition process is performed at a second angle relative to the top surface of the substrate.

### Claim 4 (depends on 1)

The method of claim 1, wherein:
the substrate comprises a first region and a second region;
the forming of the recesses comprises:
forming first recesses in the first region; and
forming second recesses in the second region;
the forming of the source/drain patterns in the recesses comprises:
forming first source/drain patterns in the first recesses; and
forming second source/drain patterns in the second recesses; and
the method further comprises forming a third spacer layer by performing a second directional deposition process between the forming of the first source/drain patterns and the forming of the second source/drain patterns.

### Claim 5 (depends on 1)

The method of claim 1, wherein the second spacer layer is formed to be thicker on the side surfaces of the active patterns than on the side surfaces of the sacrificial gate patterns.

### Claim 6 (depends on 1)

The method of claim 1, wherein the forming of the recesses comprises:
removing portions of the first spacer layer to form a gate spacer on side surfaces of the sacrificial gate patterns.

### Claim 7 (depends on 6)

The method of claim 6, wherein the forming of the recesses further comprises:
removing the second spacer layer from the side surfaces of the sacrificial gate patterns.

### Claim 8 (depends on 6)

The method of claim 6, wherein the forming of the recesses comprises:
removing portions of the first spacer layer and the second spacer layer to form a fence spacer defining the recesses between the sacrificial gate patterns.

### Claim 9 (depends on 8)

The method of claim 8, wherein the fence spacer comprises:
a first fence spacer formed from the first spacer layer; and
a second fence spacer formed from the second spacer layer.

### Claim 10 (depends on 8)

The method of claim 8, wherein the source/drain patterns are formed by a selective epitaxial growth process.

### Claim 11 (depends on 10)

The method of claim 10, wherein the source/drain patterns are formed using inner surfaces of the recesses as seed layers.

### Claim 12 (depends on 8)

The method of claim 8, wherein top surfaces of the source/drain patterns are higher than a top surface of the fence spacer.

### Claim 13

A method of fabricating a semiconductor device, comprising:
forming active patterns extending in a second direction on a substrate, the substrate comprising a first region and a second region;
forming sacrificial gate patterns crossing the active patterns and extending in a first direction;
forming a first spacer layer on side surfaces of the active patterns and side surfaces of the sacrificial gate patterns;
performing a first directional deposition process on the first spacer layer in the first direction and in a direction opposite to the first direction to form a second spacer layer on the first spacer layer;
removing portions of the active patterns that are exposed between the sacrificial gate patterns to form recesses between the sacrificial gate patterns;
forming source/drain patterns in the recesses; and
replacing the sacrificial gate patterns with gate electrodes,
wherein forming of the recesses comprises:
forming first recesses in the first region; and
forming second recesses in the second region,
wherein the forming of the source/drain patterns in the recesses comprises:
forming first source/drain patterns in the first recesses; and
forming second source/drain patterns in the second recesses,
and wherein the method further comprises forming a third spacer layer by performing a second directional deposition process between the forming of the first source/drain patterns and the forming of the second source/drain patterns.

### Claim 14 (depends on 13)

The method of claim 13, wherein the first directional deposition process is an ion implantation directional deposition process, and the first directional deposition process comprises a first deposition process that is performed in the first direction, and a second deposition process that is performed in the direction opposite to the first direction.

### Claim 15 (depends on 14)

The method of claim 14, wherein the first deposition process is performed at a first angle relative to a top surface of the substrate, and the second deposition process is performed at a second angle relative to the top surface of the substrate.

### Claim 16 (depends on 13)

The method of claim 13, wherein the second spacer layer is formed to be thicker on the side surfaces of the active patterns than on the side surfaces of the sacrificial gate patterns.

### Claim 17 (depends on 13)

The method of claim 13 wherein the forming of the recesses comprises:
removing portions of the first spacer layer to form a gate spacer on side surfaces of the sacrificial gate patterns.

### Claim 18 (depends on 17)

The method of claim 17, wherein the forming of the recesses further comprises:
removing the second spacer layer from the side surfaces of the sacrificial gate patterns.

### Claim 19 (depends on 17)

The method of claim 17, wherein the forming of the recesses comprises:
removing portions of the first spacer layer and the second spacer layer to form a fence spacer defining the recesses between the sacrificial gate patterns.

### Claim 20 (depends on 19)

The method of claim 19, wherein the fence spacer comprises:
a first fence spacer formed from the first spacer layer; and
a second fence spacer formed from the second spacer layer.