Back to results
US 12,765,037 B2Granted
Semiconductor device and fabrication method thereof
AssigneeUnited Microelectronics Corp.
InventorKuan-Liang Liu
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a substrate having a logic circuit region and a peripheral circuit region thereon, a dielectric layer on the substrate; a first gate trench in the dielectric layer within the logic circuit region, a second gate trench in the dielectric layer within the peripheral circuit region, a first replacement gate structure in the first gate trench, and a second replacement gate structure in the second gate trench. The second replacement gate structure includes a T-shaped second central bulk metal layer completely covers a top surface of a second gate dielectric layer and a second work function metal layer, and a second mask layer capping an upper portion of the second central bulk metal layer.
Claims18
A semiconductor device, comprising:
- a substrate having a logic circuit region and a peripheral circuit region thereon;
- a dielectric layer on the substrate;
- a first interfacial oxide layer on the substrate in the logic circuit region;
- a second interfacial oxide layer thicker than the first interfacial oxide layer on the substrate in the peripheral circuit region;
- a first gate trench in the dielectric layer within the logic circuit region;
- a second gate trench in the dielectric layer within the peripheral circuit region;
- a first replacement gate structure in the first gate trench, wherein the first replacement gate structure comprises a first gate dielectric layer, a first work function metal layer on the first gate dielectric layer, and a first central bulk metal layer, wherein the first gate dielectric layer and the first work function metal layer wrap around a lower portion of the first central bulk metal layer, and an upper portion of the first central bulk metal layer protrudes from a top surface of the first gate dielectric layer and the first work function metal layer, and wherein a first mask layer caps the upper portion of the first central bulk metal layer, the first gate dielectric layer and the first work function metal layer;
- and
- a second replacement gate structure in the second gate trench, wherein the second replacement gate structure comprises a second gate dielectric layer, a second work function metal layer on the second gate dielectric layer, and a second central bulk metal layer, wherein the second gate dielectric layer and the second work function metal layer wrap around a lower portion of the second central bulk metal layer, and an upper portion of the second central bulk metal layer completely covers a top surface of the second gate dielectric layer and the second work function metal layer, and wherein a second mask layer caps the upper portion of the second central bulk metal layer;
- wherein the first central bulk metal layer has an I-shaped sectional profile, and the second central bulk metal layer has a T-shaped sectional profile.
7 more elements
A method for forming a semiconductor device, comprising:
- providing a substrate having a logic circuit region and a peripheral circuit region thereon;
- forming a dielectric layer on the substrate;
- forming a first interfacial oxide layer on the substrate in the logic circuit region;
- forming a second interfacial oxide layer thicker than the first interfacial oxide layer on the substrate in the peripheral circuit region;
- forming a first gate trench in the dielectric layer within the logic circuit region;
- forming a second gate trench in the dielectric layer within the peripheral circuit region;
- forming a first replacement gate structure in the first gate trench, wherein the first replacement gate structure comprises a first gate dielectric layer, a first work function metal layer on the first gate dielectric layer, and a first central bulk metal layer, wherein the first gate dielectric layer and the first work function metal layer wrap around a lower portion of the first central bulk metal layer, and an upper portion of the first central bulk metal layer protrudes from a top surface of the first gate dielectric layer and the first work function metal layer, and wherein a first mask layer caps the upper portion of the first central bulk metal layer, the first gate dielectric layer and the first work function metal layer;
- and
- forming a second replacement gate structure in the second gate trench, wherein the second replacement gate structure comprises a second gate dielectric layer, a second work function metal layer on the second gate dielectric layer, and a second central bulk metal layer, wherein the second gate dielectric layer and the second work function metal layer wrap around a lower portion of the second central bulk metal layer, and an upper portion of the second central bulk metal layer completely covers a top surface of the second gate dielectric layer and the second work function metal layer, and wherein a second mask layer caps the upper portion of the second central bulk metal layer;
- wherein the first central bulk metal layer has an I-shaped sectional profile, and the second central bulk metal layer has a T-shaped sectional profile.
7 more elements
Dependencies are inferred from the claim text.