Semiconductor apparatus, fabrication method thereof and memory system
OwnerXuelian Yu, Yanwei Shi +2inventors
InventorsXuelian Yu, Yanwei Shi, Hu Ding, Yuxuan Ren
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Abstract
The present disclosure relates to a semiconductor apparatus, a fabrication method thereof, and a memory system. In the present disclosure, different semiconductor devices (e.g., a high-voltage device and a low-voltage device) of a semiconductor apparatus are provided with gate spacers of different thicknesses by two dielectric deposition operations. Due to the use of the two dielectric deposition operations, the present disclosure can both provide a high-voltage device with a gate spacer having a relatively larger thickness and provide a low-voltage device with a gate spacer having a relatively smaller thickness, such as a thin gate spacer having a thickness less than 8 nm.
Claims20
A method of fabricating a semiconductor apparatus, comprising:
- providing a semiconductor substrate;
- forming a first gate stack and a second gate stack on a first semiconductor device region and a second semiconductor device region, respectively, of the semiconductor substrate, the first gate stack comprising a first gate and a first gate dielectric, and the second gate stack comprising a second gate and a second gate dielectric;
- performing a first deposition operation of depositing a first dielectric material to form a first dielectric material over a top surface and sidewalls of the first gate stack and over a top surface and sidewalls of the second gate stack;
- removing portions of the first dielectric material over the sidewalls of the second gate stack;
- and
- performing a second deposition operation of depositing the first dielectric material over the top surface and sidewalls of the first gate stack and over the top surface and sidewalls of the second gate stack to form the first dielectric material over the sidewalls of the first gate stack and the sidewalls of the second gate stack, so that a first gate spacer formed over the sidewalls of the first gate stack has a thickness larger than that of a second gate spacer formed over the sidewalls of the second gate stack, wherein after the second deposition the first dielectric material is in contact with the sidewalls of the first gate stack and the sidewalls of the second gate stack.
A semiconductor apparatus, comprising:
- a first semiconductor device, comprising a first semiconductor device region of a semiconductor substrate, a first gate stack, and a first gate spacer;
- and
- a second semiconductor device, comprising a second semiconductor device region of the semiconductor substrate, a second gate stack, and a second gate spacer,
- wherein a number of layers of a first dielectric material in the first gate spacer is larger than a number of layers of the first dielectric material in the second gate spacer by one, wherein the first dielectric material is in contact with the first gate stack and the second gate stack, and a thickness of the first gate spacer is larger than that of the second gate spacer.
A memory system, comprising:
- a memory;
- and
- a memory controller coupled to the memory and configured to control operations of the memory, wherein at least one of the memory and the memory controller comprises a semiconductor apparatus,
- wherein the semiconductor apparatus comprises:
- a first semiconductor device, comprising a first semiconductor device region of a semiconductor substrate, a first gate stack, and a first gate spacer;
- and
- a second semiconductor device, comprising a second semiconductor device region of the semiconductor substrate, a second gate stack, and a second gate spacer, and
- wherein a number of layers of a first dielectric material in the first gate spacer is larger than a number of layers of the first dielectric material in the second gate spacer by one, wherein the first dielectric material is in contact with the first gate stack and the second gate stack, and a thickness of the first gate spacer is larger than that of the second gate spacer.
Dependencies are inferred from the claim text.