Semiconductor structure and method for manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJhon-Jhy Liaw
Life of this patent
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Abstract
A semiconductor structure includes a substrate, nanostructures, source/drain features, a gate structure, inner spacers, and dielectric layers. The nanostructures are over the substrate and spaced apart from each other in a Z-direction. The source/drain features are attached to the nanostructures in an X-direction. The gate structure wraps around the nanostructures and extends in a Y-direction. The inner spacers are between the nanostructures in the Z-direction. The dielectric layers are under the inner spacers. Bottom surfaces of the dielectric layers are lower than a bottommost surface of the gate structure.
Claims20
A method for manufacturing a semiconductor structure, comprising:
- forming a fin over a substrate, wherein the fin comprises first semiconductor layers and second semiconductor layers alternating stacked in a Z-direction;
- forming a dummy gate structure extending in a Y-direction and over the fin;
- forming source/drain trenches in the fin and on opposite sides of the dummy gate structures in an X-direction;
- forming dielectric layers under the fin through the source/drain trenches;
- forming inner spacers in the fin and over the dielectric layers through the source/drain trenches;
- forming source/drain features in the source/drain trenches;
- and
- replacing the dummy gate structure and the first semiconductor layers with a gate structure wrapping around the second semiconductor layers.
A method for manufacturing a semiconductor structure, comprising:
- forming fins over a substrate, wherein the fins comprise first semiconductor layers and second semiconductor layers alternating stacked;
- forming a dummy gate structure extending in a first direction and over the fins;
- forming gate spacers on sidewalls of the dummy gate structure in a second direction different from the first direction;
- forming source/drain trenches on opposite sides of the dummy gate structures in the second direction;
- forming first gaps under the gate spacers;
- forming dielectric layers in the first gaps;
- forming source/drain features in the source/drain trenches;
- and
- replacing the dummy gate structure with a gate structure over the second semiconductor layers.
A method for manufacturing a semiconductor structure, comprising:
- forming a fin over a substrate, wherein the fin comprises first semiconductor layers and second semiconductor layers alternating stacked;
- forming a dummy gate structure over the fin;
- forming source/drain trenches in the fin to expose the substrate;
- forming polymer layers on sidewalls of the fin exposed in the source/drain trenches;
- etching the substrate through the source/drain trenches to form first gaps under the second semiconductor layers;
- forming dielectric layers in the first gaps;
- forming spacers between the second semiconductor layers and the dielectric layers;
- forming source/drain features in the source/drain trenches;
- and
- replacing the dummy gate structure with a gate structure over the second semiconductor layers.
Dependencies are inferred from the claim text.