# US 12,764,965 B2 · Semiconductor device based on dielectric material containing metal interstitial impurity > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,764,965 B2 - Document ID: US12764965B2 - Status: Granted - Kind: B2 - Application number: 18/397,387 - Filed: 2023-12-27 - Published: 2025-01-23 - Granted: 2026-10-13 - Earliest claimed: 2023-07-18 - Assignees: Institute of Microelectronics, Chinese Academy of Sciences - Applicants: Institute of Microelectronics, Chinese Academy of Sciences - Inventors: Qing Luo; Yuan Wang; Ming Liu - Web page: https://patentgrep.com/patent/US12764965B2 ## CPC - H10B 51/30: characterised by the memory core region - H10B 53/30: characterised by the memory core region - H10D 30/701: {IGFETs having ferroelectric gate insulators, e.g. ferroelectric FETs} - H10D 64/033: {comprising ferroelectric layers} - H10D 64/689: {having ferroelectric layers} - H10B: ELECTRONIC MEMORY DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract The present disclosure provides a semiconductor device based on a dielectric material containing a metal interstitial impurity, including: a substrate, a dielectric material layer, and a functional layer. A material for preparing the dielectric material layer is a compound containing the metal interstitial impurity. The dielectric material layer and/or the functional layer is configured to subject to at least one of electricity, heat, light or magnetism, such that the dielectric material layer reaches a crystallization temperature to transit from a first state to a second state. ## Claims ### Claim 1 A semiconductor device based on a dielectric material containing a metal interstitial impurity, comprising: a substrate, a dielectric material layer, and a functional layer; wherein a material for preparing the dielectric material layer is a compound containing the metal interstitial impurity; wherein the dielectric material layer and/or the functional layer is configured to subject to at least one of electricity, heat, light or magnetism, such that the dielectric material layer reaches a crystallization temperature to transit from a first state to a second state; and wherein the metal interstitial impurity is in a lattice interstice of the dielectric material in a crystalline state. ### Claim 2 (depends on 1) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 1, wherein a chemical formula of the compound containing the metal interstitial impurity is: XaY1−aZbW, wherein X is a first element, Y is a doped impurity element, Z is an interstitial impurity element, W is a second element, a is a content of the first element, (1−a) is a content of the doped impurity element, wherein 0≤a≤1; and b is a content of the interstitial impurity element, wherein 0.05≤b≤0.5. ### Claim 3 (depends on 2) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 2, wherein the first element is selected from transition metal element, hafnium, zirconium, silicon, aluminum, titanium, tantalum, barium, strontium, lanthanum, yttrium, erbium, calcium, magnesium, and rare-earth element; the second element is selected from nitrogen, oxygen, and titanium acid; the doped impurity element is selected from one or more of transition metal element, hafnium, zirconium, silicon, aluminum, titanium, tantalum, barium, strontium, lanthanum, yttrium, erbium, calcium, magnesium, and rare-earth element; and the interstitial impurity element is selected from one or more of transition metal element, hafnium, zirconium, silicon, aluminum, titanium, tantalum, barium, strontium, lanthanum, yttrium, erbium, calcium, magnesium, and rare-earth element. ### Claim 4 (depends on 3) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 3, wherein the dielectric material layer comprises hafnium zirconium oxide compound, and the first element and/or the doped impurity element and/or the interstitial impurity element are selected from hafnium and zirconium; and wherein the second element is oxygen. ### Claim 5 (depends on 1) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 1, wherein the first state comprises an amorphous state, and the second state comprises a crystalline state; the crystalline state comprises a monoclinic crystal state, a tetragonal crystal state, a rhombohedral crystal state, an orthorhombie crystal state, or a cubic crystal state, wherein the dielectric material layer in the crystalline state contains the metal interstitial impurity in a lattice interstice. ### Claim 6 (depends on 5) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 5, wherein the metal interstitial impurity in the lattice interstice of the dielectric material layer in the crystalline state causes lattice expansion and lattice deformation, so as to generate a tensile stress and/or a compressive stress, and the dielectric material layer has a ferroelectric domain. ### Claim 7 (depends on 1) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 1, wherein the first state comprises a first crystalline state, and the second state comprises a second crystalline state. ### Claim 8 (depends on 7) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 7, wherein the first crystalline state and/or the second crystalline state comprises a region or a domain in a monoclinic crystal state, a tetragonal crystal state, a rhombohedral crystal state, an orthorhombic crystal state, or a cubic crystal state. ### Claim 9 (depends on 1) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 1, wherein when the dielectric material layer is in a ferroelectric polarization state as a whole or in part, a polarization orientation of the dielectric material layer points towards an interface between the dielectric material layer and the functional layer or an interface between the dielectric material layer and the substrate, and the polarization orientation is reversed by using at least one of electricity, heat, light, force or magnetism, such that the dielectric material layer is switched between different ferroelectric states. ### Claim 10 (depends on 1) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 1, wherein the dielectric material layer further comprises an antiferroelectric state, and when the dielectric material layer is in the antiferroelectric state as a whole or in part, adjacent dipole moments in the dielectric material layer are oriented opposite to each other, such that an overall polarization of the dielectric material layer tends to disappear. ### Claim 11 (depends on 1) The semiconductor device based on the dielectric material containing the metal interstitial impurity according to claim 1, wherein the functional layer comprises an electrode and a channel layer, so as to achieve a function of a device comprising at least one of a transistor, a capacitor, a resistor, a conductor laser, or an optical sensor.