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US 12,764,961 B2Granted
Semiconductor device with reduced area and method of manufacturing the same
AssigneeKioxia Corporation
InventorsHideto Takekida, Junichi Shibata
Life of this patent
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Abstract
In one embodiment, a semiconductor device includes a first substrate, a first transistor provided on an upper face of the first substrate, and a memory cell array provided above the first transistor. The device further includes a second substrate provided above the memory cell array, and a second transistor provided on an upper face of the second substrate.
Claims20
A semiconductor device comprising:
- a first substrate;
- a first device layer including a first transistor provided on an upper face of the first substrate, and a first pad;
- a memory cell array layer including a memory cell array provided above the first transistor, and a second pad;
- a second substrate provided above the memory cell array layer;
- and
- a second device layer including a second transistor provided on an upper face of the second substrate,
- wherein
- the second pad is directly jointed to the first pad, and
- the second substrate includes a lower face provided on a opposite side of the upper face of the second substrate, the second device layer being provided on a side of the upper face of the second substrate, the memory cell array layer being provided on a side of the lower face of the second substrate.
6 more elements
A method of manufacturing a semiconductor device, comprising:
- forming a first device layer on a first substrate, the first device layer including a first transistor and a first pad;
- forming a memory cell array layer above the first transistor, the memory cell array layer including a memory cell array and a second pad;
- bonding a second substrate with the first substrate via the first device layer and the memory cell array layer;
- and
- forming a second device layer on the second substrate after the bonding, the second device layer including a second transistor,
- wherein
- the second pad is directly jointed to the first pad, and
- the second substrate includes a first face, and a second face provided on a opposite side of the first face, the second device layer being provided on a side of the first face of the second substrate, the memory cell array layer being provided on a side of the second face of the second substrate.
5 more elements
Dependencies are inferred from the claim text.