Three-dimensional semiconductor device containing core-bias electrode surrounded by vertical semiconductor channel and method of forming the same

A method of forming a semiconductor device, comprising:

• forming an alternating stack of insulating layers and spacer material layers, wherein the spacer material layers are formed as or are subsequently replaced with electrically conductive layers;
• forming a memory opening through the alternating stack;
• forming a memory opening fill structure in the memory opening, wherein the memory opening fill structure comprises a memory film, a vertical semiconductor channel that is laterally surrounded by the memory film, a drain region contacting a first end portion of the vertical semiconductor channel, a dielectric core surrounded by the vertical semiconductor channel, and a core-bias electrode surrounded by the dielectric core;
• and
• forming a source layer on a second end portion of the vertical semiconductor channel and on an end portion of the core-bias electrode.