Bit lines having high electrical conductivity and low mutual capacitance and related apparatuses, computing systems, and methods

A method of manufacturing a memory device, the method comprising:

• forming contacts over vertical strings of memory cells;
• forming an electrically insulating material over the contacts;
• and
• forming bit lines in the electrically insulating material and at least substantially perpendicularly to the vertical strings of memory cells, at least some of the bit lines electrically connecting to the vertical strings of memory cells through the contacts, the electrically insulating material defining air gaps between the bit lines,
• wherein forming the bit line in the electrically insulating material comprises:
• forming trenches in the electrically insulating material over the contacts and the vertical strings of memory cells;
• forming a first electrically conductive material comprising elemental tungsten in the trenches;
• removing portions of the electrically insulating material to form air gaps between the trenches;
• removing at least a portion of the first electrically conductive material from the trenches;
• and
• forming a second electrically conductive material comprising copper in the trenches to replace the removed first electrically conductive material, the second electrically conductive material overlying the first electrically conductive material and the second electrically conductive material more electrically conductive than the first electrically conductive material.

A method of manufacturing a memory device, the method comprising:

• forming a first electrically conductive material comprising elemental tungsten in trenches in an electrically insulating material over vertical strings of memory cells;
• removing excess portions of the first electrically conductive material to expose the electrically insulating material between the trenches;
• removing portions of the electrically insulating material to form air gaps laterally adjacent to the first electrically conductive material within the trenches;
• removing a portion of the electrically insulating material and the first electrically conductive material;
• recessing the first electrically conductive material within the trenches;
• and
• forming a second electrically conductive material comprising copper over the first electrically conductive material and within the trenches to form bit lines comprising a lower portion including the elemental tungsten and an upper portion including the copper, the electrically insulating material including the bit lines therein, the air gaps positioned between the bit lines, a memory cell array including memory cells corresponding to intersections between the bit lines and the word lines, the second electrically conductive material more electrically conductive than the first electrically conductive material.

An apparatus, comprising:

• bit lines comprising a lower portion including tungsten and an upper portion including copper;
• an electrically insulating material including the bit lines therein, an interface between the lower portion and the upper portion in one of the bit lines being at a different depth within the electrically insulating material than an additional interface between an additional lower portion and an additional upper portion in an additional one of the bit lines;
• air gaps between the bit lines;
• word lines;
• and
• a memory cell array including memory cells corresponding to intersections between the bit lines and the word lines.