Switch regulator

A circuit comprising:

• an amplifier having a first amplifier input coupled to a voltage reference terminal;
• a second amplifier input, and an amplifier output;
• a first transistor having a first terminal coupled to a power terminal;
• a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output;
• a second transistor having a first terminal coupled to the power terminal;
• a second terminal, a body terminal coupled to the second terminal of the second transistor and a control terminal coupled to the amplifier output;
• a third transistor having a first terminal coupled to the second amplifier input;
• a second terminal, and a control terminal coupled to the second terminal of the second transistor;
• a resistor having a first terminal coupled to the second terminal of the second transistor, and a second terminal;
• a fourth transistor having a first terminal, a second terminal, and a control terminal coupled to the second terminal of the second transistor;
• a fifth transistor having a first terminal, a second terminal, and a control terminal coupled to the first terminal of the fourth transistor;
• and
• a sixth transistor having a first terminal coupled to the second terminal of the fifth transistor, a second terminal, and a control coupled to the second terminal of the resistor.

A digital-to-analog converter comprising:

• a resistor ladder;
• a switch circuit coupled to a rung of the resistor ladder, the switch circuit including a first switch having a control input and a second switch having a control input;
• a first driver circuit having an output coupled to the control input of the first switch;
• a second driver circuit having an output coupled to the control input of the second switch, and a voltage input;
• a switch regulator circuit having an output coupled to the voltage input of the second driver circuit, the switch regulator circuit including:
• an amplifier having a first amplifier input coupled to a voltage reference terminal;
• a second amplifier input, and an amplifier output;
• a first transistor having a first terminal coupled to a power terminal;
• a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output;
• a second transistor having a first terminal coupled to the power terminal;
• a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output;
• and
• a third transistor having a first terminal coupled to the second amplifier input, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor.