# US 12,763,787 B2 · Speed signal converter with reverse polarity detection and correction

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- Number: US 12,763,787 B2
- Document ID: US12763787B2
- Status: Granted
- Kind: B2
- Application number: 18/608,210
- Filed: 2024-03-18
- Published: 2025-09-18
- Granted: 2026-10-13
- Earliest claimed: 2024-03-18
- Assignees: Hamilton Sundstrand Corporation
- Applicants: Hamilton Sundstrand Corporation
- Inventors: James Saloio, Jr.; Gary L. Hess
- Web page: https://patentgrep.com/patent/US12763787B2

## CPC

- H03M 1/12: Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence)
- G01P 3/481: of pulse signals
- G01P 21/02: of speedometers
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- G01P: MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT (measuring or recording blood flow A61B5/02, A61B8/06; monitoring speed or deceleration of electrically-propelled vehicles B60L3/00; vehicle lighting systems adapted to indicate speed B60Q1/54; determining position or course in navigation, measuring ground distance in geodesy or surveying G01C; combined measuring devices for measuring two or more variables of movement G01C23/00; measuring velocity of sound G01H; measuring velocity of light G01J7/00; measuring direction or velocity of solid objects by reception or emission of radiowaves or other waves and based on propagation effects, e.g. Doppler effect, propagation time, direction of propagation, G01S; measuring speed of nuclear radiation G01T; measuring acceleration of gravity G01V; {measuring or recording the speed of trains B61L23/00; speed indicators incorporated in motor vehicles B60K35/00; measuring frequency or phase G01R; traffic control G08G})

## Abstract

A speed signal converter circuit including an analog signal conditioning stage and a digital signal processing stage. The analog signal conditioning stage determines a voltage of an input speed signal, combines the voltage with an alternating current (AC) injection voltage signal having a set frequency to generate a combined voltage signal, and outputs a pulsed zero-crossing signal including a rising edge and a falling edge indicating a zero-crossing of the input speed signal based on the combined voltage signal. The digital signal processing stage determines a rising edge slope of the input speed signal and a falling edge slope of the input signal based on a rising edge and a falling edge of the pulsed zero-crossing signal, and determines an optimal edge among one of the rising edges or the falling edges based on a comparison between the rising edge slope and the falling edge slope.

## Claims

### Claim 1

A speed signal converter circuit comprising:
an analog signal conditioning stage configured to determine a voltage of an input speed signal, combine the voltage with an alternating current (AC) injection voltage signal having a set frequency to generate a combined voltage signal, and output a pulsed zero-crossing signal including a rising edge and a falling edge indicating a zero-crossing of the input speed signal based on the combined voltage signal; and
a digital signal processing stage in signal communication with the analog signal conditioning stage, the digital signal processing stage configured to determine a rising edge slope of the input speed signal and a falling edge slope of the input signal based on a rising edge and a falling edge of the pulsed zero-crossing signal, and to determine an optimal edge among either the rising edge or the falling edge based on a comparison between the rising edge slope and the falling edge slope,
wherein the digital signal processing stage compares the optimal edge to an expected edge and detects a reverse wiring fault when the optimal edge does not match the expected edge.

### Claim 2 (depends on 1)

The speed signal converter of claim 1, wherein the digital signal processing stage determines whether the rising edge slope or the falling edge slope has a larger slope, and selects the rising edge or the falling edge associated with the larger slope as the optimal edge.

### Claim 3 (depends on 1)

The speed signal converter of claim 1, wherein the expected edge is a predetermined falling edge.

### Claim 4 (depends on 3)

The speed signal converter of claim 3, wherein the digital signal processing stage outputs an edge selection signal commanding a controller to process the rising edge when the optimal edge does not match the expected edge.

### Claim 5 (depends on 3)

The speed signal converter of claim 3, wherein the digital signal processing stage determines an optimal slope and a frequency of the input speed signal based at least in part on the optimal edge.

### Claim 6 (depends on 5)

The speed signal converter of claim 5, wherein the digital signal processing stage compares the optimal slope to an expected slope range having a minimum slope value and a maximum slope value, and determines one or both of a sensor fault and a wiring fault when the optimal slope does not fall within the expected slope range.

### Claim 7 (depends on 6)

The speed signal converter of claim 6, wherein the digital signal processing stage determines an amplitude of the input speed signal based at least in part on the optimal slope.

### Claim 8 (depends on 7)

The speed signal converter of claim 7, wherein the digital signal processing stage compares the amplitude to an expected amplitude range having a minimum amplitude value and a maximum amplitude value, and determines one or both of a sensor fault and a wiring fault when the amplitude does not fall within the expected amplitude range.

### Claim 9 (depends on 1)

The speed signal converter of claim 1, wherein the digital signal processing stage includes a pulse rejection filter configured to:
process the combined voltage signal to reject signal pluses the AC injection voltage signal corresponding to the set frequency;
count a number of first rejected pulses corresponding to the rising edge to determine a first rejected pulse count sum and a number of second rejected pulses corresponding to the falling edge to determine a second rejected pulse sum; and
determine a first slope of the rising edge based on the first rejected pulse count sum and a second slope of the falling edge based on the second rejected pulse sum.

### Claim 10

A method of processing an input speed signal, the method comprising:
determining a voltage of an input speed signal;
combining the voltage with an alternating current (AC) injection voltage signal having a set frequency to generate a combined voltage signal;
generating a pulsed zero-crossing signal including a rising edge and a falling edge that indicates a zero-crossing of the input speed signal based on the combined voltage signal;
determining a rising edge slope of the input speed signal and a falling edge slope of the input signal based on a rising edge and a falling edge of the pulsed zero-crossing signal; and
determining an optimal edge among either the rising edge or the falling edge based on a comparison between the rising edge slope and the falling edge slope;
comparing the optimal edge to an expected edge; and
detecting a reverse wiring fault when the optimal edge does not match the expected edge.

### Claim 11 (depends on 10)

The method of claim 10, further comprising:
determining whether the rising edge slope or the falling edge slope has a larger slope; and
selecting the rising edge or the falling edge associated with the larger slope as the optimal edge.

### Claim 12 (depends on 10)

The method of claim 10, wherein the expected edge is a predetermined falling edge.

### Claim 13 (depends on 12)

The method of claim 12, further comprising commanding a controller to process the rising edge when the optimal edge does not match the expected edge.

### Claim 14 (depends on 12)

The method of claim 12, further comprising determining an optimal slope and a frequency of the input speed signal based on at least in part on the optimal edge.

### Claim 15 (depends on 14)

The method of claim 14, further comprising:
comparing the optimal slope to an expected slope range having a minimum slope value and a maximum slope value; and
determining one or both of a sensor fault and a wiring fault when the optimal slope does not fall within the expected slope range.

### Claim 16 (depends on 15)

The method of claim 15, further comprising determining an amplitude of the input speed signal based at least in part on the optimal slope.

### Claim 17 (depends on 16)

The method of claim 16, further comprising:
comparing the amplitude to an expected amplitude range having a minimum amplitude value and a maximum amplitude value; and
determining one or both of a sensor fault and a wiring fault when the amplitude does not fall within the expected amplitude range.

### Claim 18 (depends on 1, 10)

The method of claim 10, wherein determining the rising edge slope and the falling edge slope comprises:
The speed signal converter of claim 1, wherein the digital signal processing stage comprises:
processing the combined voltage signal to reject signal pluses the AC injection voltage signal corresponding to the set frequency;
counting a number of first rejected pulses corresponding to the rising edge to determine a first rejected pulse count sum and a number of second rejected pulses corresponding to the falling edge to determine a second rejected pulse sum; and
determining a first slope of the rising edge based on the first rejected pulse count sum and a second slope of the falling edge based on the second rejected pulse sum.
