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US 12,763,769 B2Granted
Managing ZQ calibration in memory devices
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsLin Miao, Han Qin, Lei Jia
Life of this patent
Estimating the term…
Abstract
Systems, devices, and methods for managing ZQ calibration in semiconductor devices are provided. In one aspect, a circuit includes a memory configured to provide an offset code and a logic circuit. The logic circuit is configured to receive a ZQ calibration code as a first input and the offset code as a second input, and provide a resistor code as an output based on the ZQ calibration code and the offset code.
Claims20
A circuit, comprising:
- a memory configured to store an offset code that is predetermined;
- and
- a logic circuit configured to receive an impedance equilibrium (ZQ) calibration code as a first input and the offset code as a second input, and provide a resistor code as an output based on the ZQ calibration code and the offset code, wherein the offset code is independent from the ZQ calibration code,
- wherein a number of digits of the offset code is less than or equal to a number of digits of the ZQ calibration code.
1 more element
A method, comprising:
- receiving, as a first input of a logic circuit, an impedance equilibrium (ZQ) calibration code;
- receiving, as a second input of the logic circuit, an offset code from a memory, the offset code being predetermined and stored in the memory, wherein the offset code is independent from the ZQ calibration code;
- and
- providing, as an output of the logic circuit, a resistor code based on the ZQ calibration code and the offset code,
- wherein a number of digits of the offset code is less than or equal to a number of digits of the ZQ calibration code.
2 more elements
A memory system, comprising:
- a memory device configured to store data and comprising a memory array and a circuit, the circuit comprising:
- a memory configured to store an offset code that is predetermined;
- and
- a logic circuit configured to receive a ZQ calibration code as a first input and the offset code as a second input, and provide a resistor code as an output based on the ZQ calibration code and the offset code, wherein the offset code is independent from the ZQ calibration code, and wherein a number of digits of the offset code is less than or equal to a number of digits of the ZQ calibration code;
- and
- a memory controller coupled to the memory device and configured to operate the memory device.
3 more elements
Dependencies are inferred from the claim text.