Duty cycle control circuit applicable to DC-DC buck conversion

A duty cycle control circuit applicable to DC-DC buck conversion, the duty cycle control circuit being capable of generating a duty cycle control signal to control a duty cycle of an output signal and comprising:

• a dual ramp generator configured to generate a first ramp signal and a second ramp signal, wherein the first ramp signal and the second ramp signal have a same frequency but different phases;
• a first comparator configured to compare the first ramp signal with a feedback signal to generate a first control signal;
• a second comparator configured to compare the second ramp signal with the feedback signal to generate a second control signal;
• and
• a logical circuit configured to perform a first predetermined logical operation according to a first signal and a first conduction-control signal and thereby generate a first duty cycle control signal as a first part of the duty cycle control signal, and further configured to perform a second predetermined logical operation according to a second signal and a second conduction-control signal and thereby generate a second duty cycle control signal as a second part of the duty cycle control signal,
• wherein the first signal is the first control signal or an inversion of the first control signal, and the second signal is the second control signal or an inversion of the second control signal,
• wherein when the first signal is the inversion of the first control signal and the second signal is the inversion of the second control signal;
• when a voltage level of the first ramp signal is lower than a voltage level of the feedback signal, a voltage level of the first control signal is low;
• when the voltage level of the first ramp signal is higher than the voltage level of the feedback signal, the voltage level of the first control signal is high;
• when a voltage level of the second ramp signal is lower than the voltage level of the feedback signal, a voltage level of the second control signal is low;
• and when the voltage level of the second ramp signal is higher than the voltage level of the feedback signal, the voltage level of the second control signal is high.