Erase saturation mitigation in non-volatile memory

A method for erasing memory cells, the method comprising:

• applying a plurality of erase pulses to selected memory cells on selected NAND strings;
• determining which of the selected NAND strings passed erase after applying the plurality of erase pulses;
• programming the selected memory cells on the selected NAND strings that passed erase while inhibiting from programming the selected memory cells on the selected NAND strings that did not pass erase after applying the plurality of erase pulses;
• and
• applying an additional erase pulse to the selected NAND strings after programming the selected memory cells on the selected NAND strings that passed erase.

A non-volatile storage system comprising:

• a memory structure comprising blocks, each block comprising a plurality of word lines and a plurality of NAND strings, each word line in a block connected to each NAND string in the block, the memory structure having a plurality of bit lines, each NAND string associated with a bit line;
• and
• one or more control circuits in communication with the memory structure, wherein the one or more control circuits are configured to:
• apply a plurality of erase voltages to a group of memory cells on selected NAND strings in a selected block, the group of memory cells connected to a set of the word lines in the selected block;
• perform an erase verify of the group of the memory cells to determine which of the selected NAND strings passed erase;
• and
• responsive to a determination that a first set of NAND strings in the selected block passed erase and a second set of NAND strings in the selected block did not pass the erase after applying the plurality of erase voltages, the first set of the NAND strings having a first set of the group of the memory cells:
• program the first set of the memory cells on the first set of NAND strings while inhibiting from programming all other memory cells in the selected block;
• and
• apply an additional erase voltage to the group of memory cells on the selected NAND strings in the selected block after programming the first memory cells.