# US 12,763,145 B2 · Non-volatile memory with hole pre-charge and isolated signal lines > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,763,145 B2 - Document ID: US12763145B2 - Status: Granted - Kind: B2 - Application number: 18/357,399 - Filed: 2023-07-24 - Published: 2024-06-20 - Granted: 2026-10-13 - Earliest claimed: 2022-12-20 - Assignees: SanDisk Technologies LLC - Applicants: Sandisk Technologies, Inc. - Inventors: Jiacen Guo; Xiang Yang; Jiahui Yuan - Web page: https://patentgrep.com/patent/US12763145B2 ## CPC - G11C 16/102: {External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators} - G11C 5/063: {Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay} - G11C 16/3404: {Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A non-volatile memory system programs memory cells from an erased threshold voltage distribution to programmed threshold voltage distributions by performing hole pre-charging of channels of unselected NAND strings in a selected block of a selected plane including applying a source voltage to a selected signal line of a plurality of signal lines that are isolated from each other. The selected signal line is positioned between the selected block and an unselected block and is connected to a selected source line of a plurality of source lines that are isolated from each other. The selected source line is connected to the selected block. The source voltage is greater in magnitude than any predetermined threshold voltage of the erased threshold voltage distribution. After the pre-charging, the system boosts channels of unselected NAND strings in the selected block and applies a program voltage to selected NAND strings in the selected block. ## Claims ### Claim 1 A non-volatile storage apparatus, comprising: non-volatile memory cells arranged in blocks; a plurality of source lines connected to the memory cells, the plurality of source lines are electrically isolated from each other, each source line of the plurality of source lines is connected to a subset of the blocks; a plurality of signal lines positioned between the blocks and connected to the plurality of source lines, the plurality of signal lines are configured to apply a source voltage to the plurality of source lines, signals lines of the plurality of signal lines are electrically isolated from each other; isolation layers between signal lines of the plurality of signal lines to isolate the signal lines of the plurality of signal lines from each other; and a control circuit connected to the non-volatile memory cells and the plurality of signal lines, each of the signals lines of the plurality of signal lines can be separately controlled by the control circuit, the control circuit is configured to program the memory cells by performing hole pre-charging followed by boosting and applying a program voltage, the control circuit is configured to perform the hole pre-charging by applying the source voltage to a selected source line of the plurality of source lines for a selected block via a selected signal line of the plurality of signal lines without applying the source voltage to all source lines of the plurality of source lines. ### Claim 2 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: each block is connected to a source line of the plurality of source lines; and the isolation layers are positioned between source lines of the plurality of source lines to electrically isolate the source lines of the plurality of source lines from each other. ### Claim 3 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the source voltage is greater in magnitude than any predetermined threshold voltage of an erased threshold voltage distribution for the memory cells. ### Claim 4 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the source voltage is more than double in magnitude than any predetermined threshold voltage of an erased threshold voltage distribution for the memory cells. ### Claim 5 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the applying the source voltage to the selected signal line charges up only the selected source line and does not charge up all other source lines of the plurality of source lines. ### Claim 6 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: each block is connected to one of the source lines of the plurality of source lines; and each signal line of the plurality of signal lines is positioned between two blocks and connected to one source line of the plurality of source lines. ### Claim 7 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the memory cells are arranged as NAND strings in the blocks. ### Claim 8 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the non-volatile memory cells are arranged as NAND strings having a source end and a bit line end; and the control circuit is configured to performing hole pre-charging by pre-charging from the source end. ### Claim 9 (depends on 8) The non-volatile storage apparatus of claim 8, wherein: the control circuit is configured to program the memory cells in a word line order in the direction from the bit line end to the source end. ### Claim 10 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the apparatus further comprises word lines connected to the memory cells; the memory cells are arranged as NAND strings in the blocks; the NAND strings include a source end and a bit line end; each block of memory cells is divided into sub-blocks that can be independently erased and programmed; and the control circuit is configured to program the memory cells within a sub-block in a word line order in the direction from the bit line end to the source end. ### Claim 11 (depends on 1) The non-volatile storage apparatus of claim 1, wherein: the memory cells are arranged as NAND strings in the blocks; the source voltage is greater in magnitude than any predetermined threshold voltage of an erased threshold voltage distribution for the memory cells; the applying the source voltage to the selected source line charges up only the selected source line and does not charge up all other source lines of the plurality of source lines; each source line of the plurality of source lines is connected to a subset of the blocks and each block is connected to one of the source lines of the plurality of source lines; each signal line of the plurality of signal lines is positioned between two blocks and connected to one source line of the plurality of source lines; and the control circuit is configured to program memory cells of a selected block by performing hole pre-charging of channels of unselected NAND strings in the selected block followed by boosting channels of unselected NAND strings in the selected block and applying a program voltage to selected NAND strings in the selected block. ### Claim 12 A method for programming memory cells from an erased threshold voltage distribution to one or more programmed threshold voltage distributions, comprising: performing hole pre-charging of channels of unselected NAND strings in a selected block of a selected plane including applying a source voltage to a selected signal line of a plurality of signal lines that are electrically isolated from each other and are connected to the plane, the selected signal line is positioned between the selected block and an unselected block and is connected to a selected source line of a plurality of source lines, the plurality of source lines are connected to the plane such that the selected source line is connected to the selected block and unselected source lines are not connected to the selected block, each source line of the plurality of source lines is connected to a subset of blocks of the plane, the source voltage is greater in magnitude than any predetermined threshold voltage of the erased threshold voltage distribution, the performing hole pre-charging includes applying the source voltage to the selected source line of the plurality of source lines without applying the source voltage to all source lines of the plurality of source lines; and after the pre-charging, boosting channels of unselected NAND strings in the selected block and applying a program voltage to selected NAND strings in the selected block. ### Claim 13 (depends on 12) The method of claim 12, wherein: the applying the source voltage to the selected signal line charges up only the selected source line and does not charge up all other source lines of the plurality of source lines. ### Claim 14 (depends on 12) The method of claim 12, wherein: the selected block is divided into sub-blocks; the method further comprises independently erasing and programming the sub-blocks of the selected block, including programming memory cells within a sub-block in a word line order in the direction from a bit line to the selected source line; the performing hole pre-charging of channels of unselected NAND strings comprises pre-charging from the selected source line; and the applying the source voltage to the selected signal line charges up only the selected source line and does not charge up all other source lines of the plurality of source lines. ### Claim 15 (depends on 12) The method of claim 12, wherein: each source line of the plurality of source lines is connected to a subset of blocks and each block is connected to one of the source lines; and each signal line of the plurality of signal lines is positioned between two blocks and connected to one source line of the plurality of source lines. ### Claim 16 A non-volatile storage apparatus, comprising: non-volatile memory cells arranged as NAND strings in blocks; a plurality of source lines connected to the memory cells such that each source line of the plurality of source lines is connected to a subset of the blocks and each block is connected to one of the source lines of the plurality of source lines; a plurality of signal lines positioned between the blocks; isolation layers positioned between the blocks, the isolation layers electrically isolate source lines of the plurality of source lines from each other; and a control circuit connected to the non-volatile memory cells and the plurality of signal lines, the control circuit includes one or more voltage sources, the plurality of signal lines are connected to the one or more voltage sources and are connected to the plurality of source lines for applying voltage from the one or more voltage sources to the plurality of source lines, the control circuit is configured to program memory cells of a selected block by performing hole pre-charging of channels of unselected NAND strings in the selected block followed by boosting channels of unselected NAND strings in the selected block and applying a program voltage to selected NAND strings in the selected block, the control circuit is configured to perform hole pre-charging by applying a source voltage to a selected source line of the plurality of source lines for a selected block via a selected signal line of the plurality of signal lines without applying the source voltage to all source lines of the plurality of source lines, the source voltage is greater in magnitude than any predetermined threshold voltage of an erased threshold voltage distribution for the memory cells. ### Claim 17 (depends on 16) The non-volatile storage apparatus of claim 16, wherein: the apparatus further comprises word lines connected to the memory cells; the NAND strings include a source end and a bit line end; each block of memory cells is divided into sub-blocks that can be independently erased and programmed; the control circuit is configured to program the memory cells within a sub-block in a word line order in the direction from the bit line end to the source end; the control circuit is configured to performing hole pre-charging by pre-charging from the source end; and the applying the source voltage to the selected signal line charges up only the selected source line and does not charge up all other source lines of the plurality of source lines. ### Claim 18 (depends on 16) The non-volatile storage apparatus of claim 16, wherein: each source line of the plurality of source lines is connected to a subset of the blocks and each block is connected to one source line of the plurality of source lines; and each signal line of the plurality of signal lines is positioned between two blocks and connected to one source line of the plurality of source lines. ### Claim 19 (depends on 1) The non-volatile storage apparatus of claim 1, further comprising: multiple voltage sources connected to the plurality of signal lines.