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US 12,763,130 B2Granted
High capacity memory system using standard controller component
AssigneeRambus Inc.
InventorsFrederick A Ware, Suresh Rajan, Scott C. Best
Life of this patent
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Abstract
The embodiments described herein describe technologies for using the memory modules in different modes of operation, such as in a standard multi-drop mode or as in a dynamic point-to-point (DPP) mode (also referred to herein as an enhanced mode). The memory modules can also be inserted in the sockets of the memory system in different configurations.
Claims20
A memory controller comprising:
- a command and address (CA) interface to be coupled to a first memory module and a second memory module, wherein the memory controller is to send first CA information to the first memory module and the second memory module via the CA interface, and wherein the memory controller is to configure the first memory module to share second CA information to the second memory module via a private bus responsive to the first memory module receiving the first CA information;
- and
- a data interface to be coupled to the first memory module, and the second memory module, wherein the memory controller is to receive first data from the first memory module responsive to the first memory module receiving the first CA information, and wherein the memory controller is to receive second data from the second memory module responsive to the second memory module receiving the second CA information via the private bus.
A memory controller comprising:
- a command and address (CA) interface to be coupled to a first memory module and a second memory module, the CA interface to send first CA information to the first memory module, and the CA interface to configure the first memory module to share second CA information to the second memory module via a private bus responsive to the first memory module receiving the first CA information, wherein the first CA information comprises chip select (CS) information, and wherein the second CA information comprises a copy of the CS information;
- and
- a data interface to be coupled to the first memory module and the second memory module, wherein the memory controller is to receive first data from the first memory module responsive to the first memory module receiving the first CA information, and wherein the memory controller is to receive second data from the second memory module, responsive to the second memory module receiving the second CA information via the private bus.
A method of operating a memory controller, the method comprising:
- sending, using a command and address (CA) interface, first CA information to a first memory module and a second memory module;
- configuring the first memory module to share second CA information to the second memory module via a private bus responsive to the first memory module receiving the first CA information;
- receiving, using a data interface, first data from the first memory module responsive to the first memory module receiving the first CA information;
- and
- receiving, using the data interface, second data from the second memory module, responsive to the second memory module receiving the second CA information via the private bus.
2 more elements
Dependencies are inferred from the claim text.