Display configuration for refresh rate control

A method for controlling a display device, the method comprising:

• at a gate integrated circuit (IC), outputting a clock signal to control a plurality of image-forming elements of a display device, wherein the plurality of image-forming elements are arranged in a grid that includes a plurality of rows and a plurality of columns;
• at a gate output buffer, controlling, based at least in part on an output enable signal being active, whether the clock signal is received by image-forming elements in a corresponding row group including one or more rows of the plurality of rows;
• at a source IC, outputting data signals to control the plurality of image-forming elements;
• at a block selection component of a plurality of block selection components, controlling, via a respective block selection signal, whether image-forming elements in a corresponding column group including one or more columns of the plurality of columns are refreshed based at least in part on the data signals, wherein each block selection component is configured to propagate a state of its respective block selection signal through a corresponding trace extending along the corresponding column group;
• and
• at a timing controller, controlling the output enable signal and each respective block selection signal to thereby control refresh rates for the plurality of image-forming elements, such that a first display region including a first subset of image-forming elements is refreshed at a first refresh rate, and a second display region including a second subset of image-forming elements is refreshed at a second refresh rate.

A computing device, comprising:

• a processing component configured to output imagery for display;
• and
• a display device configured to display the imagery output by the processing component, the display device comprising:
• a plurality of image-forming elements arranged in a grid, wherein the grid includes a plurality of rows and a plurality of columns;
• a gate integrated circuit (IC) configured to output a clock signal to control the plurality of image-forming elements;
• a gate output buffer configured to control, based at least in part on an output enable signal being active, whether the clock signal is received by image-forming elements in a corresponding row group including two or more rows of the plurality of rows;
• a source IC configured to output data signals to control the plurality of image-forming elements;
• a plurality of block selection components, each block selection component configured to control, via a respective block selection signal, whether image-forming elements in a corresponding column group including two or more columns of the plurality of columns are refreshed based at least in part on the data signals, wherein each block selection component is configured to propagate a state of its respective block selection signal through a corresponding trace extending along the corresponding column group;
• and
• a timing controller configured to control the output enable signal and each respective block selection signal to thereby control refresh rates for the plurality of image-forming elements, such that a first display region including a first subset of image-forming elements is refreshed at a first refresh rate, and a second display region including a second subset of image-forming elements is refreshed at a second refresh rate.