Display device and driving method thereof

A display device comprising a plurality of pixel cells, each of the pixel cells comprising:

• a light-emitting device;
• and
• a pixel driving circuit including a pulse width modulation module and a pulse amplitude modulation module;
• wherein the pulse width modulation module comprises a comparator and a duty cycle control module, the duty cycle control module comprises a first transistor, and the pulse width modulation module further comprises a second transistor, a fourth transistor, a sixth transistor and a first capacitor;
• the comparator is electrically connected to a first level signal input terminal, a first node, a second node and a second level signal input terminal of the pulse width modulation module;
• a gate of the first transistor is electrically connected to a first light-emitting control signal input terminal, one of a source and a drain of the first transistor is electrically connected to a first ramp signal input terminal, and another of the source and the drain of the first transistor is electrically connected to a third node;
• the first ramp signal input terminal is configured to output a first ramp signal;
• a gate of the second transistor is electrically connected to a second pulse width modulation signal input terminal, one of a source and a drain of the second transistor is electrically connected to a first data signal input terminal, and another of the source and the drain of the second transistor is electrically connected to the third node;
• a first plate of the first capacitor is electrically connected to the second node, and a second plate of the first capacitor is electrically connected to the third node;
• a gate of the fourth transistor is electrically connected to a first pulse width modulation signal input terminal or to the second pulse width modulation signal input terminal, one of a source and a drain of the fourth transistor is electrically connected to the first node, and another of the source and the drain of the fourth transistor is electrically connected to the second node;
• and
• a gate of the sixth transistor is electrically connected to the first node, one of a source and a drain of the sixth transistor is electrically connected to a first power supply signal input terminal, and another of the source and the drain of the sixth transistor is electrically connected to the pulse amplitude modulation module,
• wherein the duty cycle control module further comprises:
• a fourteenth transistor, a gate of the fourteenth transistor is electrically connected to a second light-emitting control signal input terminal, one of a source and a drain of the fourteenth transistor is electrically connected to a second ramp signal input terminal, and another of the source and the drain of the fourteenth transistor is electrically connected to the third node,
• wherein the second ramp signal input terminal is configured to output a second ramp signal, and the second ramp signal has a waveform having a slope different from a slope of a waveform of the first ramp signal,
• wherein the first transistor and the fourteenth transistor are configured to selectively output the first ramp signal or the second ramp signal to the third node, and
• wherein, in a light-emitting phase of the display device, the first data signal input terminal is configured to output a first data signal, and a voltage of the first data signal is less than a voltage of the first ramp signal or the second ramp signal such that the sixth transistor is turned on and the light-emitting device emits light.