Display apparatus

A display apparatus comprising:

• a plurality of pixels, each of the plurality of pixels including a pixel circuit and a pixel electrode connected to the pixel circuit;
• and
• a plurality of data lines respectively connected to the plurality of pixels,
• wherein at least one pixel electrode in the plurality of pixels overlaps with a data line among the plurality of data lines,
• wherein a data signal is supplied to each of the plurality of pixels via the plurality of data lines once per one frame, and an initializing voltage is supplied to the pixel electrode in each of the plurality of pixels at least twice per one frame,
• wherein a time taken for the data signal to be supplied to each of the plurality of pixels during one frame is less than or equal to a period during which the initializing voltage is supplied to the pixel electrode in each of the plurality of pixels during one frame,
• wherein the pixel circuit comprises:
• a driving transistor;
• a first transistor connected between a corresponding data line among the plurality of data lines and a gate electrode of the driving transistor, wherein the first transistor is turned on in response to a first gate signal and transmits the data signal from the corresponding data line to a gate of the driving transistor;
• and
• a second transistor connected between the pixel electrode and an initializing voltage line to which the initializing voltage is supplied, wherein the second transistor is turned on in response to a second gate signal and transmits the initializing voltage to the pixel electrode,
• wherein the driving transistor comprises:
• a lower gate electrode supplied with a driving voltage;
• an upper gate electrode supplied with a voltage corresponding to the data signal;
• and
• a semiconductor layer arranged between the lower gate electrode and the upper gate electrode,
• wherein the first transistor comprises:
• a lower gate electrode;
• an upper gate electrode connected to the lower gate electrode;
• and
• a semiconductor layer arranged between the lower gate electrode and the upper gate electrode,
• wherein the lower gate electrode of the first transistor is arranged between the upper gate electrode of the driving transistor and the semiconductor layer of the first transistor, and
• wherein the upper gate electrode of the driving transistor is arranged between the semiconductor layer of the driving transistor and the lower gate electrode of the first transistor.

A display apparatus comprising a plurality of pixels, each of the plurality of pixels comprising:

• a light-emitting device;
• a first transistor configured to output a driving current to the light-emitting device;
• a second transistor connected between a data line and the first transistor, wherein the second transistor is turned on in response to a first gate signal and transmits a data signal from the data line to a gate of the first transistor;
• and
• a third transistor connected between the light-emitting device and an initializing voltage line, wherein the third transistor is turned on in response to a second gate signal and transmits an initializing voltage that is supplied through the initializing voltage line to an electrode of the light-emitting device,
• wherein the first gate signal is supplied to the second transistor in each of the plurality of pixels once per one frame, and the second gate signal is supplied to third transistor in each of the plurality of pixels at least twice per one frame,
• a time taken for the first gate signal to be supplied to the second transistor in each of the plurality of pixels during one frame is less than or equal to a period during which the second gate signal is supplied to the third transistor in each of the plurality of pixels during one frame, and
• during an address scan period in one frame, the first gate signal is supplied to the second transistor in each of the plurality of pixels before the second gate signal is supplied to the third transistor in each of the plurality of pixels.