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US 12,762,980 B2Granted
Display device and method of driving the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHajun Lee, Mi-Ri Park, Junhyuk Yang, Seungmin Jeong
Life of this patent
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Abstract
A display device including a plurality of channels including at least one dummy channel; a plurality of first sampling circuits sampling a plurality of dummy voltages corresponding to each of the at least one dummy channel; and a holding/scaling circuit including a first input node, a second input node, a first output node, a second output node, a first feedback capacitor connected between the first input node and the first output node, and a second feedback capacitor connected between the second input node and the second output node.
Claims20
A display device comprising:
- a plurality of channels, the plurality of channels include at least one dummy channel;
- a plurality of first sampling circuits, each configured to sample one of a plurality of dummy voltages corresponding to each of the at least one dummy channel, each dummy voltage of the plurality of dummy voltages comprises a respective floating dummy voltage different from a pixel voltage;
- and
- a holding/scaling circuit including a first input node, a second input node, a first output node, a second output node, a first feedback capacitor connected between the first input node and the first output node, and a second feedback capacitor connected between the second input node and the second output node,
- wherein the holding/scaling circuit is configured to:
- store voltages of substantially a same magnitude in the first feedback capacitor and the second feedback capacitor,
- receive the plurality of sampled dummy voltages from the first input node and the second input node, and
- output a plurality of dummy output voltages acquired by amplifying the plurality of sampled dummy voltages to the first output node and the second output node.
5 more elements
A display device comprising:
- a first input node and a second input node;
- a first output node and a second output node;
- a first feedback capacitor connected between the first input node and the first output node;
- a second feedback capacitor connected between the second input node and the second output node;
- a differential amplifier including a first input terminal, a second input terminal, a first output terminal connected to the first output node, and a second output terminal connected to the second output node;
- a plurality of offset capacitors respectively connected to the first input terminal and the second input terminal, and configured to store offset voltages of the first input terminal and the second input terminal;
- a first switch having a first end connected to the first output node and a second end connected to the first feedback capacitor;
- a second switch having one end connected to the second output node and the other end connected to the second feedback capacitor;
- a third switch having one end connected to the second end of the first switch and a second end connected to an input terminal that is configured to receive a predetermined first voltage;
- a fourth switch having a first end connected to the second end of the second switch and a second end connected to the input terminal that is configured to receive the predetermined first voltage;
- a fifth switch having a first end connected to the second end of the first switch and a second end connected to an input terminal that is configured to receive a first reference voltage;
- and
- a sixth switch having a first end connected to the second end of the second switch and a second end connected to an input terminal that is configured to receive a second reference voltage that is different from the first reference voltage.
10 more elements
A display system comprising:
- a display panel including a plurality of gate lines, a plurality of data lines, a plurality of sensing lines including at least one dummy channel, and a plurality of pixels;
- a host processor configured to generate image data for display on the display panel and transmit the image data to a timing controller;
- a data driver including a first input node, a second input node, a first output node, a second output node, a first feedback capacitor connected between the first input node and the first output node, and a second feedback capacitor connected between the second input node and the second output node,
- wherein the data driver is configured to:
- store voltages of substantially a same magnitude in the first feedback capacitor and the second feedback capacitor,
- sample each of a plurality of dummy voltages corresponding to the at least one dummy channel, each dummy voltage of the plurality of dummy voltages comprises a respective floating dummy voltage different from a pixel voltage,
- receive the plurality of sampled dummy voltages from the first input node and the second input node,
- output a plurality of dummy output voltages acquired by amplifying the plurality of sampled dummy voltages to the first output node and the second output node, and
- receive the plurality of dummy output voltages and a plurality of active output voltages to generate a data sensing signal indicating electrical features of the plurality of pixels;
- and
- wherein the timing controller is configured to receive image data, compensate for the image data based on the data sensing signal, and generate the compensated image data.
8 more elements
Dependencies are inferred from the claim text.