Topological outcome codes for clifford circuits

A computer system coupled operatively to a quantum computer, the computer system comprising:

• a processor;
• and
• operatively coupled to the processor, computer memory holding instructions that cause the processor to correct a fault in an application of a Clifford circuit to a qubit register of the quantum computer, the instructions comprising:
• instructions for receiving circuit data defining the Clifford circuit,
• instructions for receiving additional data identifying one or more measurements belonging to each of a plurality of faces of a lattice,
• instructions for emitting an outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome for the application of the Clifford circuit to the qubit register, and
• instructions for emitting a topological outcome code based on the circuit data, the additional data, and the outcome code, the topological outcome code including a series of check operators that support quantum-error correction via a topological decoder, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

A method to correct a fault in an application of a Clifford circuit to a qubit register of a quantum computer, the method comprising:

• receiving circuit data defining the Clifford circuit;
• receiving additional data identifying one or more measurements belonging to each of a plurality of faces of a lattice;
• emitting an outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome for the application of the Clifford circuit to the qubit register;
• and
• emitting a topological outcome code based on the circuit data, the additional data, and the outcome code, the topological outcome code including a series of check operators that support quantum-error correction via a topological decoder, thereby enabling fault correction in the application of the Clifford circuit to the qubit register,
• wherein emitting the topological outcome code includes accumulating outcome checks along a plurality of timelines of the plurality of faces of the lattice, and, for each of the plurality of faces of the lattice,
• computing a shortened outcome code corresponding that face, and
• transforming a plurality of outcome checks of the shortened outcome code into a chronological order that reduces overlap among the outcome checks and/or duration of one or more of the outcome checks.