Computing device and electronic device
OwnerNing Qiao, Sadique UlAmeen Sheik +2inventors
InventorsNing Qiao, Sadique UlAmeen Sheik, Xin Bai, Philipp Weidel
Life of this patent
Estimating the term…
Loading patent…
OwnerNing Qiao, Sadique UlAmeen Sheik +2inventors
InventorsNing Qiao, Sadique UlAmeen Sheik, Xin Bai, Philipp Weidel
Estimating the term…
A computing device includes computing modules, each of which comprises a plurality of neuron populations. The computing module is configured to project the input spike train which is weighted by a first weight matrix to a first neuron population through a multi-synapse projection. The multi-synapse projection has at least two different and positive synaptic time constants, or at least two different synaptic transmission delays. In order to realize time-domain convolution in a spiking neural network with low hardware resource consumption, a multi-synaptic projection technology means with different synaptic time constants is proposed. On this basis, a waveform-aware spike neural network for time-domain signal processing characterized by residual connections and skip connections is further proposed. Through these technical means, the performance gap between SNN and ANN is bridged, and SNN with performance reaching or close to ANN is obtained.
A computer neuromorphic chip, configured to process ambient signals, the neuromorphic chip comprising a plurality of hardware-implemented computing blocks fabricated on the chip, wherein each of the computing blocks comprises a plurality of hardware spiking neuron circuit populations formed on the chip, and each of the computing blocks receives a corresponding input spikes train;
A neuromorphic chip, configured to process ambient signals, the neuromorphic chip comprising a spiking neural network system, the neuromorphic chip acquiring the ambient signal and transforming the ambient signal into a second spike train or an injected current signal;
A neuromorphic chip configured to process ambient signals, the neuromorphic chip comprising a plurality of hardware-implemented computing blocks fabricated on the chip, each of the computing blocks comprising a plurality of hardware spiking neuron circuit populations formed on the chip, and each of the computing blocks receiving a corresponding input signal;
Dependencies are inferred from the claim text.