System level testing of artificial intelligence primitives
AssigneeInternational Business Machines Corporation
InventorsAli Y. Duale, Timothy Slegel, Patrick Duffy
Life of this patent
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Abstract
Methods, system, and computer program product are disclosed for enhanced system level testing of an AI hardware accelerator comprising Artificial Intelligence (AI) primitives. The system level testing provides uncompromised test coverage of the AI hardware accelerator while enabling efficient and effective testing performance. Enhanced test data generation, result prediction, and test execution are provided for system level testing of AI hardware accelerator including the AI primitives.
Claims20
A computer implemented method comprising:
- providing test input data;
- executing the test input data by an AI hardware accelerator, on a function code in a chain of multiple function codes provided by the AI hardware accelerator, applying an output of the function code to a next function code in the chain, and providing a separate function code output;
- executing, for each of the remaining function codes in the chain, a received function code output, applying a function code output to a next function code in the chain, and providing a separate function code output;
- where a last function code in the chain provides an AI hardware accelerator output;
- executing the input data by a software machine learning model, on a simulated function code in a chain of multiple simulated function codes, applying an output of the simulated function code to a next simulated function code in the chain,
- executing, for each of the remaining simulated function codes in the chain, a received simulated function code output, and applying an output of the simulated function code to a next function code in the chain where a last simulated function code in the chain provides an expected result output;
- and
- comparing the AI hardware accelerator output and the expected result output to validate the AI hardware accelerator.
A system, comprising:
- a processor;
- and
- a memory, wherein the memory includes a computer program product to perform operations for testing of Artificial Intelligence (AI) hardware accelerator, the operations comprising:
- providing test input data;
- executing the test input data by an AI hardware accelerator, on a function code in a chain of multiple function codes provided by the AI hardware accelerator, applying an output of the function code to a next function code in the chain, and providing a separate function code output,
- executing, for each of the remaining function codes in the chain, a received function code output, applying a function code output to a next function code in the chain, and providing a separate function code output;
- where a last function code in the chain provides an AI hardware accelerator output;
- executing the input data by a software machine learning model, on a simulated function code in a chain of multiple simulated function codes, applying an output of the simulated function code to a next simulated function code in the chain,
- executing, for each of the remaining simulated function codes in the chain, a received simulated function code output, and applying an output of the simulated function code to a next function code in the chain where a last simulated function code in the chain provides an expected result output;
- and
- comparing the AI hardware accelerator output and the expected result output to validate the AI hardware accelerator.
A computer program product for testing of Artificial Intelligence (AI) hardware accelerator, the computer program product comprising:
- a non-transitory computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code executable by one or more computer processors to perform an operation comprising:
- providing test input data;
- executing the test input data by an AI hardware accelerator, on a function code in a chain of multiple function codes provided by the AI hardware accelerator, applying an output of the function code to a next function code in the chain, and providing a separate function code output,
- executing, for each of the remaining function codes in the chain, a received function code output, applying a function code output to a next function code in the chain, and providing a separate function code output;
- where a last function code in the chain provides an AI hardware accelerator output;
- executing the input data by a software machine learning model, on a simulated function code in a chain of multiple simulated function codes, applying an output of the simulated function code to a next simulated function code in the chain,
- executing, for each of the remaining simulated function codes in the chain, a received simulated function code output, and applying an output of the simulated function code to a next function code in the chain where a last simulated function code in the chain provides an expected result output;
- and
- comparing the AI hardware accelerator output and the expected result output to validate the AI hardware accelerator.
Dependencies are inferred from the claim text.