Method and apparatus for processing sparse data
AssigneeBeijing Tsingmicro Intelligent Technology Co., Ltd.
InventorsShibin Tang, Peng Ouyang
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Abstract
The disclosure provides a method and apparatus for processing sparse data. The method is applied to a reconfigurable processor that includes a PE array, and the PE array includes P×Q PE units. The method includes: dividing a sparse weight matrix to be calculated into at least one unit block; grouping a plurality of unit blocks into a computing group; and obtaining an effective weight address corresponding to each effective weight in the computing group.
Claims14
A method for processing sparse data, performed by a reconfigurable processor, wherein the reconfigurable processor comprises a processing element (PE) array, and the PE array comprises P×Q PE units, the method comprising:
- dividing a sparse weight matrix to be calculated into at least one unit block;
- grouping a plurality of unit blocks into a computing group;
- and
- obtaining an effective weight address corresponding to each effective weight in the computing group;
- wherein grouping the plurality of unit blocks into the computing group comprises:
- grouping the plurality of unit blocks in the sparse weight matrix into a computing group in a column direction of the sparse weight matrix;
- determining whether a total number of effective weights in the computing group is more than (P×Q)/2;
- in response to the total number of effective weights in the computing group being more than (P×Q)/2, splitting the computing group into two computing groups evenly in the column direction of the sparse weight matrix;
- repeating the above determining and splitting until the total number of effective weights in each computing group is less than (P×Q)/2;
- and
- determining a minimum number of unit blocks included in each computing group in the sparse weight matrix as a group division number n, and dividing the sparse weight matrix in the column direction into a plurality of computing groups according to n.
An apparatus for processing sparse data, comprising:
- a reconfigurable processor comprising a PE array, in which the PE array comprises P×Q PE units;
- and
- a memory configured to store instructions executable by the reconfigurable processor;
- wherein when the instructions are executed by the reconfigurable processor, the reconfigurable processor is configured to;
- divide a sparse weight matrix to be calculated into at least one unit block;
- group a plurality of unit blocks into a computing group;
- and
- obtain an effective weight address corresponding to each effective weight in the computing group;
- wherein the reconfigurable processor is further configured to:
- group the plurality of unit blocks in the sparse weight matrix into a computing group in a column direction of the sparse weight matrix;
- determine whether a total number of effective weights in the computing group is more than (P×Q)/2;
- in response to the total number of effective weights in the computing group being more than (P×Q)/2, split the computing group into two computing groups evenly in the column direction of the sparse weight matrix;
- repeat the above determining and splitting until the total number of effective weights in each computing group is less than (P×Q)/2;
- and
- determine a minimum number of unit blocks included in each computing group in the sparse weight matrix as a group division number n, and divide the sparse weight matrix in the column direction into a plurality of computing groups according to n.
Dependencies are inferred from the claim text.